Just to point this out, there is a world of difference between 320x200x4bpl and 640x200x4bpl in terms of how the CPU is affected.
The Amiga DMA design is such that it allows the CPU (and Blitter/Copper/etc) to interleave with it when DMA load is light. The higher DMA load becomes, the fewer of these interleave slots are available. The 68000 normally* accesses memory only half of the Amiga bus cycles.
The Amiga's design is optimised around this "half/half" split in such a way that up to 320x200x4BPL** the CPU is effectively not impacted by bitplane DMA fetches. When you go above this, the CPU starts to be slowed down progressively more as the number of bitplanes increase. Hires is basically the same: 640x200x2BPL** does not impact CPU speed, anything above that does. Now, for 640x200x4BPL,
all DMA slots during the bitplane fetches are in use. This effectively blocks out the CPU (and Blitter/Copper) from accessing chip memory at all. The overal slowdown is a obviously lower than 100% as the CPU does still get cycles during horizontal blanking and vertical blanking.
To illustrate the effect of this, here's a simple calculation:
Code:
Total DMA slots/cycles available (NTSC): 59212 (226 slots * 262 lines)
320x200x4 DMA slots used: 16000 ((320/16)*200*4)
640x200x4 DMA slots used: 32000 ((640/16)*200*4)
CPU speed (full frame/NTSC)
320x200x4: ~100% (due to interleaving)
640x200x4: ~54% (32000/59212)
Now there are obviously some caveats here because 3D calculations use a lot of multiplications which have a lot of idle cycles on the bus, but the majority of each rasterline where the bitplane DMA is being done will still be unusable by the CPU so as a general rule of thumb the above figures should be close enough.
*) This is not always true, instructions like MULU/MULS/DIVU/DIVS and all the rotate instructions have (far) more cycles where the CPU is not on the bus.
**) the vertical resolution is actually irrelevant here, the relevant part is the number of bitplanes.