Quote:
Originally Posted by meynaf
It's only pathological cases that can, like this :
Code:
clr.w $dff096
clr.w $dff09a
In theory no-op. In practice, horrors because the false read will write the last data present on the bus to the register, before clearing it.
One could however argue it's the chipset that's defective and unable to reply correctly to a read... |
Really? I did not know this. Of course nobody would use those instructions, but I did not think there could be such a side effect.
I thought it was simply a read, of the float value on the bus, and then a writing of 0 in $dff096/9a (so nothing).