Quote:
Originally Posted by ross
[OT]
Just out of curiosity. Is there any actual problem that CLR really can generate?
Taking into consideration only the standard hardware registers (chipset and CIA) the only ones that come to mind that can have side effects are the chipset's STROBEs and CIA's ICRs.
But in any case nothing that can generate serious problems (as long as it's not code out of control..).
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For normally written programs, CLR will cause no problem.
It's only pathological cases that can, like this :
Code:
clr.w $dff096
clr.w $dff09a
In theory no-op. In practice, horrors because the false read will write the last data present on the bus to the register, before clearing it.
One could however argue it's the chipset that's defective and unable to reply correctly to a read...
Quote:
Originally Posted by ross
Just to get along 
You're both right, simply the 6502 if it had a 16-bit bus would access the memory at twice the speed of 68k.
But since we are in the real world, the 6502 actually reads the same data at (if it ever existed) same speed.
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Makes me wonder if the two can really run at the same speed.
Isn't a 8-bit bus in some way simpler than a 16-bit one ?
Besides, the 68000 can wait for data to come if something behind is busy. The 6502 can't - it is the master of the bus at any time and leaves the unused cycles for the dma, and if it were pushed to use every possible cycle you wouldn't get any display at all anymore.