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Old 11 July 2018, 01:16   #395
1NOM155
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Join Date: Apr 2015
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Nice mate doubt solved [emoji3]
Quote:
Originally Posted by cmorley View Post
OK, I follow.


Yes the OCS Agnus only generates refresh on (BDR)A0-A7 and not A8, hence the extra circuitry. Not all DRAM chips require the same refresh row count but many xx256 need all 512 rows visiting hence the extra logic for A8 refresh generation on A501.


So if you have an OCS Agnus and fit RAM which require 512 rows refresh then you will have a problem. ECS Agnus generates A8 on refresh I understand.


My board uses CBR refresh (CAS before RAS) to solve the problem, so it works with OCS or ECS the same.


Chris
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