Motorola CPU have a lot of attractive features but they also have some irritating bulky parts. Motorola always tried to make good features which couldn't properly supported by the time technology. 6800/6809 have 16 bit index registers. It is very good theoretically but practically having 8-bit ALU and 8-bit data bus it is very slow and bulky. Motorola 680x0 have less bulky parts but 68000 or 68020 require more ticks for the similar instructions than 8086 or 80286. 68000 or 68020 have more register space and this allows to compensate more ticks. I was a bit irritated by 68000 because I have to work with 32-bit address for 24-bit address bus. It was very irritating when you need registers for data and can't use address registers for this.
I didn't note any problem with Intel LAHF/SAHF. If you need OF to check just use JO or JNO. If you need 16-bit flags just use PUSHF and POP AX. This is not a practical problem. It is about to seek beauty but tastes are different for different men.
SHL or SAL are names for the same instruction because logical or arithmetic shifts left are the same. IMHO it is obvious.
You say that you can explain all Moto's oddities. Please explain two carry flags.
What is wrong with DF flag? It allows to seek a word in a text from left to right or from right to left. It is a very good feature. Moto's ISA has no instructions like very useful and fast REP MOV, REP SCAS, ...
Yes, Intel x86 has 3 modes: USE16, USE32, USE64. It is common for complex CPU. Even old 6809 or 65816 have modes. I write x86 programs sometimes and I can assure your I had no problems with it at all. x86 assembly code commonly uses only one mode, a programmer does not have to think about modes. Only a bootstrap code may use them all or some kind of OS which uses calls to ROM BIOS. The modes have proper support with assemblers and debuggers.
x86_64 is very easy with privilege levels. It has only two such levels: user and kernel. I don't quite understand your problem. A privilege level is set by OS. It is common to use only 2 levels even with x86 software (Linux, Microsoft Windows).
Sorry I do not know anything about protected mode or MMU with 680x0.
Amiga 500 or 1200 didn't use it.
AH, BH, AL, R8L, DIL, ... are very useful to work with bytes. Intel has a big advantage here over 680x0.
You say that you have disappointed by 80386 instruction coding. It is a bit odd. A man should not work as disassembler.
I know men from DEC times they liked to write programs directly in ML. It is nonsense today. 80386 provides an easy regular syntax for addressing, it is fast for any of its format. Just use an assembler.
"Anyway, no dep[sp], no [bp] mode" - what is it about? It is possible to write, for example, MOV EAX,[ESP+EAX*8+120] or MOV ESP,[ESP+EBP*8+120].
It is slightly odd to say that two stack is safer facing x86 gigantic and very complex software.
An interrupt in the protected mode uses a special gate and a common OS stack. The details are not complex, just look Wikipedia for them. However, it is for the simple cases only. It may require a task switch in the general case and every task may have its own stack. I am not OS writer so I have to check the documentation for the details too...
BCD had no any sense. It was just a fashion and and attempt to avoid slow and not always available hardware division and multiplication.
The example for the use of parity bit is TEST AL,0A0H. The parity bit allows to get value of the 5th bit of AL.
It a common misbelief that ARM instructions are too easy. On the contrary an ARM instruction, as rule, requires 2-4 instructions of Intel x86 or 680x0. For example, ADD R1,R2,R3,shl 3 which means to assign R1 the value of R2 + R3*8 without affecting flags.
EDIT. I have just corrected information about interrupts in the protected mode.