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Search: Posts Made By: a/b
Forum: Coders. General Yesterday, 21:41
Replies: 321
Views: 22,796
Posted By a/b
-2 bytes due to alignment (extra zero at the end...

-2 bytes due to alignment (extra zero at the end is never used):

; moveq #msg2-msg3+1,d3
moveq #msg2-msg3,d3
...
;msg3 dc.b ' digits will be printed'
;msg2 dc.b 10,0
msg3...
Forum: Coders. General 20 June 2021, 17:12
Replies: 321
Views: 22,796
Posted By a/b
Unless it's one of those 'it works in this...

Unless it's one of those 'it works in this version but it's needed for that version', d5/d7 are only used as a word (where this is relevant, up to label .l7):
...
Forum: Coders. Asm / Hardware 19 June 2021, 14:38
Replies: 2
Views: 301
Posted By a/b
It's unrelated. Blitter is 16-bit, and you need...

It's unrelated. Blitter is 16-bit, and you need proper alignment/size for double CAS and/or 32-bit which is something you can guarantee with sprites and bitplanes but not with the blitter.
It's only...
Forum: Coders. Asm / Hardware 18 June 2021, 22:02
Replies: 1
Views: 146
Posted By a/b
Is the game actually accessing the disk after...

Is the game actually accessing the disk after you've started it to load additional data?
Typical scenario is to use OS functions to access the disk and then disable the OS (a500 + game = most...
Forum: Coders. General 12 June 2021, 12:18
Replies: 321
Views: 22,796
Posted By a/b
This is not equivalent: move.l...

This is not equivalent:

move.l #(65536-(ra-start))/7,D7 ; D7=maxn
; move.l #$10000-(ra-start),d7
; divu.w #7*4,D7
; lsl.l #2,D7 ; d7.w=maxn

Also missing...
Forum: Coders. General 10 June 2021, 17:33
Replies: 321
Views: 22,796
Posted By a/b
Any particular reason why DCB.B 65536-... and not...

Any particular reason why DCB.B 65536-... and not DS.B instead? As far as I can see the buffer is filled with 2000s, so why not make the executable significantly shorter?

Also, this is shorter...
Forum: Coders. General 05 June 2021, 21:35
Replies: 321
Views: 22,796
Posted By a/b
Only glanced at the code, this stuck out: ...

Only glanced at the code, this stuck out:

.l1 clr.w d6
move.b (a0)+,d6
cmpi.b #'9',d6
bhi.b .err
subi.b #'0',d6
bcs.b .err

add.w...
Forum: Coders. Asm / Hardware 31 May 2021, 09:17
Replies: 24
Views: 1,258
Posted By a/b
When you are dealing with short code sequences a...

When you are dealing with short code sequences a lot depends on how they are interfacing with the rest of the code (extreme example: super fast pixel draw but you call it with movem/jsr/movem for...
Forum: support.WinUAE 29 May 2021, 16:14
Replies: 16
Views: 1,395
Posted By a/b
Hah, I really didn't know that. Another...

Hah, I really didn't know that.
Another brilliant idea by everyone's favorite m$... Who needs more than 640kb for anything, let alone measly 512kb. :bash
Forum: Coders. General 29 May 2021, 16:06
Replies: 321
Views: 22,796
Posted By a/b
You mean the official reason? Unofficially,...

You mean the official reason? Unofficially, everyone knew it's coming, he was practically begging for it. :evilgrin
And nope, it wasn't me (to report him or complain to admins about him), I simply...
Forum: Coders. C/C++ 29 May 2021, 15:54
Replies: 4
Views: 372
Posted By a/b
It's an old KS1.x call that you can use it if...

It's an old KS1.x call that you can use it if you're allocating manually (or use static buffers). As long as it's not interleaved because InitBitMap cannot know that (it would need another parameter...
Forum: Coders. C/C++ 29 May 2021, 07:44
Replies: 4
Views: 372
Posted By a/b
AllocBitMap() does all the work, you shouldn't...

AllocBitMap() does all the work, you shouldn't call InitBitMap() afterwards because it will mess up the bitmap structure (it will mark it as non-interleaved: pad is set to 0 and not to a magic word...
Forum: Coders. Asm / Hardware 25 May 2021, 08:18
Replies: 23
Views: 2,496
Posted By a/b
C54D0: add #$0010,a0 addq.w #8,a1 ... ...

C54D0:
add #$0010,a0
addq.w #8,a1
...

Should be #4,a1 (a1 is a 32-bit watch address table, look for several similar instances of code for watch handling: a0 += 16 text, a1 += 4 address, a2 +=...
Forum: Coders. General 22 May 2021, 05:44
Replies: 321
Views: 22,796
Posted By a/b
Your words: I said "forbid", not...

Your words:



I said "forbid", not forbid. Forbid was your choice of words. It's not appropriate, that's why I quoted it.
Yes, assemblers can do whatever they want, I *said* that. Why? Because...
Forum: Coders. General 20 May 2021, 20:41
Replies: 321
Views: 22,796
Posted By a/b
Use ALIGN 0,4. I presume that ALIGN 2 is...

Use ALIGN 0,4.
I presume that ALIGN 2 is expanded to ALIGN 2,0, so it does no current address aligment (2nd argument is 0) and then adds 2 to the current address. Eg. it works the same only if the...
Forum: Coders. General 20 May 2021, 20:28
Replies: 321
Views: 22,796
Posted By a/b
If you look at moveq's opcode you will not find...

If you look at moveq's opcode you will not find size bits. moveq is always .L and there is no point, in my opinion, to write .L, it's unambiguous. Same with, for example, lea. And since these...
Forum: Coders. Asm / Hardware 14 May 2021, 23:14
Replies: 19
Views: 1,073
Posted By a/b
Hmm, now that's interesting. I haven't done any...

Hmm, now that's interesting. I haven't done any AGA coding, other than messing around with my old sources, in the last ~20 years and even back then it was pretty much setup a fmode 3 screen for c2p...
Forum: Coders. Asm / Hardware 14 May 2021, 22:07
Replies: 19
Views: 1,073
Posted By a/b
I've loaded the AGA picture into piccon as...

I've loaded the AGA picture into piccon as 320x240x256col, and the green/red jacket guy is the last person on the right side, there is no red/blue shirt girl next to him, she is the first person on...
Forum: Coders. Asm / Hardware 14 May 2021, 21:29
Replies: 19
Views: 1,073
Posted By a/b
Several things: - Stringray beat me to it, raw...

Several things:
- Stringray beat me to it, raw image size doesn't match bitplane size times depth, it's too short
- fetch mode is not set in the source, but you later mentioned you use 0. OK, 0...
Forum: Coders. General 10 May 2021, 15:57
Replies: 17
Views: 1,060
Posted By a/b
Before each hunk in memory, there is a 32-bit...

Before each hunk in memory, there is a 32-bit b-ptr to the next hunk, so they can be deallocated after exiting (bcpl ptr, have to multiply by 4 before you use it). So the first code hunk 'knows'...
Forum: Coders. Asm / Hardware 05 May 2021, 10:50
Replies: 6
Views: 944
Posted By a/b
It should be rejected. For that kind of...

It should be rejected. For that kind of "trickery" there is DC[.B|.W].
Forum: Coders. Asm / Hardware 01 May 2021, 08:10
Replies: 11
Views: 1,407
Posted By a/b
;; add.l #16,a3 ...

;; add.l #16,a3 ; move to next image pointer
addq.l #8,a3 ; move to next image pointer


a3 and a4 point to struct, 8...
Forum: Coders. Asm / Hardware 30 April 2021, 19:11
Replies: 3
Views: 719
Posted By a/b
execbase.i: UWORD AttnFlags ; special...

execbase.i:

UWORD AttnFlags ; special attention flags (readable)

******* Bit defines for AttnFlags (see above) *******************************

* Processors and Co-processors:...
Forum: Coders. Asm / Hardware 30 April 2021, 16:38
Replies: 11
Views: 1,407
Posted By a/b
Any particular reason you're adding 40 to (a4)...

Any particular reason you're adding 40 to (a4) (permanent change) and simply not to d0 (temporary change), so you also don't have to reload (a4) all the time?
Other than that, can't see anything...
Forum: Coders. Asm / Hardware 30 April 2021, 10:52
Replies: 12
Views: 1,061
Posted By a/b
If you are testing for multiple bits, as pointed...

If you are testing for multiple bits, as pointed out, it's better to use reverse logic (0 = flag is set) and test for a zero.
One way to optimize and simplify this is to use macros instead, and...
Forum: Coders. General 29 April 2021, 23:06
Replies: 321
Views: 22,796
Posted By a/b
Keep in mind that misaligned longword access is...

Keep in mind that misaligned longword access is slower. No (a3)+ so we don't know for how much is a3 being incremented, but it might be ok though.
Forum: Coders. General 29 April 2021, 16:00
Replies: 321
Views: 22,796
Posted By a/b
OK, I didn't take that into account, keeping data...

OK, I didn't take that into account, keeping data in d6/d7.

Here are my suggestions:
1. maybe invert the bcs condition: if the 16-bit case is executed a lot more frequently it should be as branch...
Forum: Coders. General 29 April 2021, 12:20
Replies: 321
Views: 22,796
Posted By a/b
Why didn't you use "the same" algorithm,...

Why didn't you use "the same" algorithm, something like (code not tested)?

move.l d4,d0
swap d0
cmp.l d0,d6 ; divident >= (divisor<<16)?
bhs.b .32bit

.16bit divu.w d4,d6
swap d6...
Forum: Coders. General 28 April 2021, 02:32
Replies: 321
Views: 22,796
Posted By a/b
Well, he's not using divu.L, it's divuL(.L) which...

Well, he's not using divu.L, it's divuL(.L) which is 32/32 -> 32:32.
I didn't look too closely at this because... Don't really want to start any flame wars but that code nearly gave me cancer....
Forum: Coders. Asm / Hardware 25 April 2021, 21:46
Replies: 8
Views: 769
Posted By a/b
OK, here it goes... There are 3 bugs: 1. blit...

OK, here it goes...
There are 3 bugs:
1. blit first/last word mask code also hits top word of C pointer
2. only 1 bitmap bitplane is allocated (again :P )
3. blit D modulo is wrong (extra width...
Forum: Coders. Asm / Hardware 25 April 2021, 00:52
Replies: 21
Views: 1,349
Posted By a/b
Haha, yeah. Maybe you missed a ";P" in the...

Haha, yeah. Maybe you missed a ";P" in the comment right after 64kb table.
It's very unlikely that such an extreme is needed here, but hey we don't know the full context so maybe that kind of...
Forum: Coders. Asm / Hardware 25 April 2021, 00:39
Replies: 21
Views: 1,349
Posted By a/b
A simple 14-cycle move.b (ax,d0.w) was the first...

A simple 14-cycle move.b (ax,d0.w) was the first thing I thought about, yeah. Not sure why complicate it further (other than adding an ext.w if you need a word again). But I thought Dan has his...
Forum: Coders. Asm / Hardware 23 April 2021, 17:57
Replies: 25
Views: 1,535
Posted By a/b
There are two modes for that (neither involves...

There are two modes for that (neither involves copper):
1. no short samples, they are set at the start of the next frame (with a ~20ms delay but that's ok because samples are sufficiently long and...
Forum: Coders. Asm / Hardware 19 April 2021, 17:15
Replies: 6
Views: 558
Posted By a/b
DOFF is ECS/AGA. It disables output to channel D....

DOFF is ECS/AGA. It disables output to channel D. This, I suppose, could be seen as D is always used, regardless of BLTCON0 bits, unless you use DOFF (for backward compatibility with OCS).
Never...
Forum: Coders. Asm / Hardware 18 April 2021, 20:34
Replies: 7
Views: 1,347
Posted By a/b
I'd go with negative logic: if custom hardware...

I'd go with negative logic: if custom hardware (disk/audio/sprites are the obvious choice) is using X, then the cpu is using !X.
Forum: Coders. Asm / Hardware 18 April 2021, 18:41
Replies: 4
Views: 468
Posted By a/b
Just theoretical, but maybe a cause.. Blitter and...

Just theoretical, but maybe a cause.. Blitter and cpu are writing to the same byte.
You are modifying the bitmap with cpu while the blitter is running. Since you generally draw a poly-line (end...
Forum: Coders. Asm / Hardware 18 April 2021, 18:09
Replies: 4
Views: 468
Posted By a/b
I see nothing wrong in that piece of code. subq.w...

I see nothing wrong in that piece of code. subq.w #8,d1 is not needed (you can add/sub 8/16/24/... and it will work the same since only the bottom 3 bits matter when bchanging the memory).
It's...
Forum: Coders. Asm / Hardware 17 April 2021, 21:44
Replies: 15
Views: 940
Posted By a/b
If you insist on solving this simple problem with...

If you insist on solving this simple problem with SMC (make sure you are running on 68000/010), this is a shorter and faster way to do it:

.notFirstBlock:
tst.w P61_LAST_POS...
Forum: Coders. Asm / Hardware 17 April 2021, 17:01
Replies: 15
Views: 940
Posted By a/b
Unless this is repeated a lot in a loop, SMC is...

Unless this is repeated a lot in a loop, SMC is not worth the trouble...
Try these options instead:

MOVE.W P61_LAST_POS,D0
CMPI.w stopper(pc),D0
BEQ.S .dontStartSequencer
st stopper...
Forum: Coders. Asm / Hardware 16 April 2021, 16:22
Replies: 7
Views: 483
Posted By a/b
Yeah, with blit modulos (both A and D should be...

Yeah, with blit modulos (both A and D should be the same in this case) reverted to original value, it works for me (I get a fighter guy with suspended trousers in top-left corner). There is another...
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