Open source 14MHz 68000 accelerator
 

This is a 14MHz 68000 accelerator with 1MB fast ram and disable switch for the Amiga.
The main attraction of this design is that it uses no programmable logic. Only standard 7400 & 4000 logic.
Tested on a rev. 5 Amiga 500. It might also work on other revisions and Amiga models but that has not been tested. The design is licensed under CERN OHL-S V2.0 The design is a complete overhaul of a design by Livio Plos and Jorg Richter.

All files can be found on github here: https://github.com/Mathesar/14mhz-accelerator

Changes include:

• New clock doubler using an old school 4046 PLL to generate the 7MHz quadrature clock.
  This is more reliable than the RC delays in the original design. Alternatively the quadrature clock can be taken from the motherboard. The latter has not been tested
• an optional 1Mb of zero waitstate Ranger RAM has been added to take full advantage of the 14MHz cpu.
• an optional reset timing based switch has been added to disable the ranger RAM upon boot.

Variants

The accelerator can be build in 3 variant:

• Accelerator only This only doubles the clock of the CPU to 14MHz.
• Accelerator plus 1MB zero waitstate ranger RAM The above but adds 1MB of fast RAM. This makes the accelerator about 2.7 times faster than a stock A500
• Accelerator plus 1MB zero waitstate ranger RAM plus disable circuit The above but adds a timer based disable option for the RAM. By holdiing ctrl-amiga-amiga down for more than 5..6 seconds the RAM is disabled.
  It is enabled again on the next (less than 5..6 seconds) reset cycle

And this is how it looks :cool:
https://raw.githubusercontent.com/Ma...0in%20A500.jpg
Moved from the previous thread here: http://eab.abime.net/showthread.php?t=97512

I like the clean looks and the KiCad logo! :-D

Gesendet von meinem XQ-BT52 mit Tapatalk

Great works , congrats! You know what we gotta do... ;)

This design is great :)
Looking forward for someone to build and sell.

As requested, a sysinfo screenshot.
This was using a 68010 cpu. With an 68000 sysinfo reports 1.49 MIPS.

https://raw.githubusercontent.com/Ma...705~2_copy.jpg

;)

Great work! :great

Is it possible version with 1.8MB of RAM?

Maybe we could make order together if someone is interested in building them?
I think it would be hard to sell for over 50Euro + shipping without CPU, but at that price
I think it will sell well.

The PCB can be had for 5 euros or so if you buy 9 at once from a supplier like Aisler.net. Cheaper probably if you buy more and are prepared to order in China.
Passives and logic IC's are cheap as well. The most expensive parts are the RAM chips, pin headers and cpu socket. The pin headers and socket could probably be sourced from ebay but I would definately buy the logic and RAm from a reputed source like Mouser/Digikey/Farnell etc.
Aisler supplies the passives for free with your order :cool

Could you please put every part needed in a list?

Thanks

There is a detailed BOM on my github. With suggested part numbers for the pin headers and RAM chips

Sure! With some larger or more RAM chips and some logic changes.

This would be nice to my GVP HD8+ and A500 system. Any one building/selling these?

Any one building these for a sale?? I would like ot get one.

Great work. How much of a game changer would this have been back in the late 80s early 90s (same license as well) if it was published in one of the Amiga magazines?

With no programmable logic, this is well done Mathesar. Thanks for the hard work on it :great

Nice work. Certainly an option for A500 users that have an A590 or GVP HD8+ or some other form of mass storage interface

That is exactly my thought. I would like to get one for my GVP HD8+ system, but seems that nobody is going to do these for sale.

I'm planing to build some but the sram is quite expensive.

What prices have you found? You can use almost all 32TSOP-II 512K * 8 SRAM 5V chips.
This is a selection on digikey:
https://www.digikey.nl/products/en/i...=1&pageSize=25

EDIT: previous link also contained 3
3V only RAM chips, this new link is correct.