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Old 20 June 2017, 22:38   #81
grond
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Originally Posted by modrobert View Post
By avoiding FPGA vendor primitives and focusing on implementing all in plain VHDL/Verilog you open the door to future ASIC masks which potentially can give at least ten times the performance of the FPGA used now.
Nonsense. An ASIC also uses "primitives". There is nothing to be avoided. Look at it like this: there is this guy that writes a lot in forums how cool bis ideas are. And then there is this other guy who has actually implemented not only a very fast 68k but who also took part in the development of IBM's POWER8 CPU and more recently of a 64bit ARM processor.
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Old 21 June 2017, 00:53   #82
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Originally Posted by matthey View Post
The Apollo Core has the wrong future (hyper optimized for affordable FPGA today only). The Minimig, FPGA Arcade and Mist have no future (they are retro only with no upgrade path).



I was contacted by Gunnar of the Apollo Team and asked to take part in his project.
Maybe its the wrong future for you.... Please can you repeat one more time how Gunnar invited you to the team, I think its just 789 times you repeated that. Also please do mention how they kicked you from the team. While you are at it, if you dont mind, show us your progress of cloning the 060, decapping or whatever, or was it your friend's friend who was doing it ? Dont forget to mention how fast Lightwave runs with a real FPU and how life is miserable without one. Oh yeah, Quake is nice too... Please do hijack every thread mentioning Vampire with your "right" path and Gunnar bashing. It must be hard knowing he doesnt even read your whining posts, he delivers.... I guess he cares a lot less about you than you care about him. Its his project, not yours and you have nothing to say about it so just stfu and let him do what he wants to do. The community has spoken, Vampire is the most popular Amiga product in years, bringing in new users, new software, new development.... IS you just jealous no1 listened to you or IS you just stupid and cant see they managed this project like it should ?
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Old 21 June 2017, 01:09   #83
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Djole501: joined jun 2017 - purpose: bashing.

so whats different in your posts - [strike]calm down[/strike] stfu yourself - i for myself enjoy reading what matthey has to say.
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Old 21 June 2017, 01:16   #84
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Yup, this thread is getting completely out of hand

I hate new hardware related threads (and it is ALWAYS hardware related threads), as 95% of the time they end up in the same manner, bitching / moaning / fighting... Friggin' nightmare for moderators to clean / sensor / control while keeping relevant content available

Moved from the "News" section, as that's not what people want to see in ABIME headlines.

EAB in general is a nice, friendly, welcoming place. It's threads like these that bring down the good vibe

...in fact, all, please don't bother posting these type of threads in the "News" section anymore as I definitely (and I'm sure other GMs) won't ever approve in future!!!

Last edited by DamienD; 21 June 2017 at 01:35.
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Old 21 June 2017, 01:19   #85
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Originally Posted by emufan View Post
Djole501: joined jun 2017 - purpose: bashing.

so whats different in your posts - calm down yourself - i for myself enjoy reading what matthey has to say.
NO, not at all, my join date has nothing to do with anything. I am just annoyed to read his comments in every thread Vampire is mentioned, he should have his own thread where he can repeat the same thing every day. Gunnar asked me to join, FPU is needed now, Gunnar has taken the wrong path, he doesnt listen to me, I know the right way etc.... So he can have you as a reader and you can enjoy yourself....

It was not me who derailed this or any other thread, right ? So why do you address me at all ? Oh yeah i have 14 posts so I should listen to the "elders"...
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Old 21 June 2017, 01:21   #86
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can anyone attache the image from the a1k post:
Quote:
Looks to me something like this (see below).

The Signal is decoupled with a Reclocker/EQ (Sony B1442AR) from the outside world and the HDMI output power regardless of cable quality and length can be... Mounted above the RGB connector.

Much more important, however, the modifications to the vampires themselves.
- stabilized voltage regulator (Better Duty Cycle and a much smaller ESR)
- to improve the GND connection to the Amiga motherboard (the two thick wires)
- Stabilization of the 5V primary voltage (less Dirt on the Power Layer)
- improved scheduling and a higher level on the HDMI output by changing the series resistors

Problem HDMi:
It was probably used for reasons of cost, not a TDMS Transmitter to the output, but directly to the driver in the FPGA. You can make, but high cycle rates are possible only with difficulty. It starts with a high damping factor, not controlled Strmtreiber in the TMDS standard, improper termination and reflections are the result. Furthermore, the Setienwiderstände are too large, i.e. it is measured at 1m HDMI cable, a Vswing (this is the negative voltage swing), below 0.4 V what is the absolute limiting case, typical of 0,7-1V. This is definitely too little...
Read:http://www.maxrev.de/files/2015/01/h...ication_14.pdf

Problem, Voltage Regulator:
The Controller will run very dirty in a bad Area (Duty Cycle) and can only try to compensate for heavy loads quickly enough (too high of ESR of capacity). In connection with "unfavorable pipe routing/Design" generated by the Switching of Dirt on the power supply, i.e., Core voltage and GND Plane. Because the HDMI output has this relation, is the Dirt on the signals on it, which will affect the graphics output.
In certain processes, the Core must regulate-Regulator jump-like loads, more or less, so that bestimmren operations, the graphics output is disturbed. It starts with strips and ends with short-term Total Blackout (depending on the pixel clock).

Actually, of all things ,should find, the developers long ago.
But well, it is how it is...

Gruss Machine
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Old 21 June 2017, 02:05   #87
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Quote:
Originally Posted by modrobert View Post
Think I understand what you are getting at, correct me if I'm wrong.

By avoiding FPGA vendor primitives and focusing on implementing all in plain VHDL/Verilog you open the door to future ASIC masks which potentially can give at least ten times the performance of the FPGA used now.

Then we are talking GHz range in performance, having 68k up there with modern PPC in performance, perhaps even surpass. I can relate to this dream and understand your concerns.
Your understanding is close. The worst choices are ISA choices which greatly restrict compatibility now and future choices (like in an ASIC). Some examples.

Apollo ISA: 64 bit integer unit registers are shared with 64 bit SIMD unit registers in the ISA
Reason: resources worked out nicely in the current Altera FPGA
Result: 128, 256, or 512 bit SIMD unit registers would give 128, 256 or 512 bit wide integer unit registers slowing down a critical path
Result: floating point in the SIMD unit would give floating point in the integer unit registers slowing down a critical path
Result: no floating point in the SIMD unit means the FPU needs to become a vector FPU (a floating point SIMD unit) and the 68k FPU deprecated (no backward compatibility) because it is not a good candidate to turn into a vector unit
Result: integer units receive only partial and non-orthogonal 64 bit support which give little advantage especially for compilers
Result: integer units have a large register file which is less energy efficient and the SIMD unit can not be gated (turned off) to save energy when not in use as is common for an SIMD unit

Apollo ISA: 80 bit 68k FPU should be replaced with 64 bit floating point vector FPU
Reason: there is no 67 bit barrel shifter in the current Altera FPGA for normalization so too slow in FPGA
Result: no compatibility with the 68k FPU

Apollo ISA: an MMU with virtual addressing is too slow in an FPGA
Reason: no room or resources for a fancy MMU in an FPGA
Result: no 68k compatible MMU layer, no 68k version of PAE, no virtual memory, etc.

Gunnar and grond think someone would make an ASIC out of the Apollo Core with the following features.

68k compatible superscalar in order 64 bit integer units, 64 bit partially MMX compatible integer only SIMD unit, vector FPU supporting single and double floating point, basic MPU unit

This may be acceptable for an FPGA given the restrictions but is not competitive in an ASIC and the ISA does not allow to grow into something more modern and compatible like the following.

68k compatible superscalar in order integer units, 256 bit partially AVX compatible SIMD unit with integer and floating point support, mostly 68k compatible FPU, MMU with virtual addressing and a compatibility layer for the 68040 and 68060 MMU

Quote:
Originally Posted by emufan View Post
can anyone attache the image from the a1k post:
The HDMI was a cheap but good hack (almost free hardware cost). I asked if it was possible to drive DVI/HDMI from the FPGA without SerDes and was pleased to find that it was. I may have been the first to ask if AGA could be implemented with it but that was relatively unknown at the time. As long as it doesn't damage any hardware then the HDMI implementation is a success IMO. The AGA on an ECS machine is awesome too but they should make a way to disable it.

Last edited by matthey; 21 June 2017 at 15:23.
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Old 21 June 2017, 02:12   #88
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Can ya'll make a video on youtube displaying this argument via AGA on an HDMI screen please?
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Old 21 June 2017, 02:26   #89
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I think the reason there is so much of this 'noise' around the Vampy/Apollo threads is because it is an evolving platform and most old school Amiga peoples still don't understand what it is or what it will become (hint...it's not an accelerator). After the dust has settled in a year or two I think it will be easier for people to get their heads around the concept
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Old 21 June 2017, 02:49   #90
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For me, a single A500 owner (was back in the day too) with a 1MB Chip - SCSI HDD with other SCSI devices (Zip drive, CD-ROM), External original floppy drive and internal GoTek, at the price point I'm getting AGA, 128MBs ram, fast IDE and HDMI output. I'm not all about the games. I really want to get back into multimedia and content creation on the Amiga and my current system is holding me back. A freaking scan doubler alone is about $100 US. And forget all the accelerators I've found on ebay, way out of my price range for less. But add all that up if I could get it; (Hi Res VGA (if not hdmi), 128MBs ram and the speed increase, with Wifi coming, I don't think it could ever be any other way for me right now....

I'm very anxious and excited. I don't do demos, I don't code on the Amiga at all - perhaps someday. I am pretty much a person that has dreamed to have these things and now it's actually going to arrive here someday. In a single package. If anything, I'm anxious and impatient.

I don't understand all the techno jargon at the low level but I get what the concerns are at a higher level. I'm eager to see the stand alone someday. But right now, I'm very much excited to have this. I mean, for a simpleton like me, the news and videos with AGA blew me away and took care of my display issue of not having something to plug into the video port besides my modulator that gives me an RCA video connection.

1MB just isn't cutting it. The original 68000 speed is a set back and the lower resolutions/display options are dauntingly upsetting. I just want to enjoy my Amiga again and back in the day with 4MBs ram and a few more bells and whistles, it was amazing. So bring it on. Geeze, what will GOLDv4 bring? I can't imagine.
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Old 21 June 2017, 05:01   #91
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As it stands, as a retro enhanced accelerator for a reduced niche segment, the Vampire is great hardware and the Apollo-core a cool hack.

But that being said, please dont ever again speak about a chance of getting it into an asic, because I can bet you all the money in the world that both Intel and NXP will sue Apollo guys to their ass to protect their IP. They have done it numerous times, and they have assured they will continue that way. And from the veredicts they got in all those cases, it seems they can litterally crush anyone.

Just a heads up for them, so that they keep low profile:

http://www.osnews.com/story/29865/In...he_x86_patents
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Old 21 June 2017, 07:17   #92
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Just a heads up for them, so that they keep low profile:

http://www.osnews.com/story/29865/In...he_x86_patents
Hilarious, TRANSMETA is mentioned there.
Hands up those who remember when "the future of Amiga" was supposedly going to be Transmeta processors and QNX OS. HA HA HA HA!

This is why every time I hear "the future of Amiga" I cringe.
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Old 21 June 2017, 08:10   #93
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Originally Posted by gulliver View Post
But that being said, please dont ever again speak about a chance of getting it into an asic, because I can bet you all the money in the world that both Intel and NXP will sue Apollo guys to their ass to protect their IP. They have done it numerous times, and they have assured they will continue that way. And from the verdicts they got in all those cases, it seems they can literally crush anyone.
I don't think there is anything to worry about.

1) Patents are good for 20 years in the U.S. All 68k patents should be expired.
2) An ISA and ABI seem to be tricky to patent.
3) Freescale had no problem with the Natami team making an FPGA 68k CPU when contacted
4) Freescale/NXP has had no problems with InnovASIC's CPU32 Fido ASIC
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Old 21 June 2017, 10:21   #94
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@ DamienD :
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...in fact, all, please don't bother posting these type of threads in the "News" section anymore as I definitely (and I'm sure other GMs) won't ever approve in future!!!
I personnaly find sad that I'm now not allowed anymore to post more video of the AGA integration, but I respect your choice as moderator. I will then continue to post them on other forums.
Have a nice day.
 
Old 21 June 2017, 10:43   #95
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@ DamienD :

I personnaly find sad that I'm now not allowed anymore to post more video of the AGA integration, but I respect your choice as moderator. I will then continue to post them on other forums.
Have a nice day.
I didn't say you cannot post hardware related threads on EAB; that's just silly.

What I said is do not post these in the News section... because threads in the News section get broadcast on the www.abime.net webpage

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Old 21 June 2017, 10:43   #96
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I dont find Matthey comments problematic.

I personally own, and love, the V600, and I plan to get a standalone too.

Matthey goes into details with regards to what he find problematic with the Vampire/Apollo design. I personally dont have the knowledge to evaluate what he says, but atleast it opens up a discussion on a technical level, where those with knowledge, and on the team, can explain why xyz is designed as it is.
I have more problem with the comments from people that doesnt own a Vampire, but still make comments from a subjective point of view.

I personally already find the Vampire to be a massive AND userfriendly upgrade to the Amiga expirience, and thats very promising considering its WORK IN PROGRESS.

People that jump up and down on the keyboard in either side, with thinly veiled insults, are the problem. Clinic technical discussions might actually increase reader knowledge.
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Old 21 June 2017, 11:04   #97
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Matt, could you please tell us your qualifications that make any of the stuff you write credible? The mere fact that you write about "a critical path" when generally in a digital chip there is exactly one critical path seems to indicate that you are, well, "self-taught". I have a PhD in microelectronics and am a professional microchip developer. What you write is nonsense but will probably impress some gullible people. Well, so be it, I cannot spend as much time as you on writing long-winded technical arguments that most people wouldn't understand anyway.
Quote:
Originally Posted by matthey View Post
This may be acceptable for an FPGA given the restrictions but is not competitive in an ASIC and the ISA does not allow to grow into something more modern and compatible like the following.

68k compatible superscalar in order integer units, 256 bit partially AVX compatible SIMD unit with integer and floating point support, mostly 68k compatible FPU, MMU with virtual addressing and a compatibility layer for the 68040 and 68060 MMU
Then go and build that.
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Old 21 June 2017, 11:16   #98
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Originally Posted by Overflow View Post
Matthey goes into details with regards to what he find problematic with the Vampire/Apollo design. I personally dont have the knowledge to evaluate what he says, but atleast it opens up a discussion on a technical level, where those with knowledge, and on the team, can explain why xyz is designed as it is.
The problem is that Matt is writing nonsense (but in an impressive manner) and that nobody can understand the nonsense (like you admit for yourself) as well as the corrections. Any "discussion on a technical level" you hope for is just a waste of time and will result in more nonsense posted. Matt just won't stop.
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Old 21 June 2017, 11:19   #99
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@DamienD :
Quote:
What I said is do not post these in the News section... because threads in the News section get broadcast on the www.abime.net webpage
well, ok. So, that's mean that a new about, let's say the new Aros nighty build is allowed in the news section, but a video about the progress of the AGA integration is not, right ?

Can you tell me where I have to post the next video, so I don't do any mistake the next time ?
Thank you.
 
Old 21 June 2017, 11:22   #100
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The problem is that Matt is writing nonsense (but in an impressive manner) and that nobody can understand the nonsense (like you admit for yourself) as well as the corrections. Any "discussion on a technical level" you hope for is just a waste of time and will result in more nonsense posted. Matt just won't stop.
Hah. Fair point.
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