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Old 25 April 2017, 11:41   #41
trixster
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Originally Posted by grelbfarlk View Post
So are we in agreement? Make a board that plugs into an 040 or 060 socket with the 040/060 plugging into it, with a fast PCI bus that goes out to a busboard with Zorro+PCI or the Mediator bridge slot. Someone ask Haynie if he can do that.
I believe that's the route the Atari guys went down with the CT60 and CTPCI.
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Old 25 April 2017, 20:53   #42
matthey
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Originally Posted by grelbfarlk View Post
To refresh anyone's memory this was the first post:

Dave Haynie has said he would have went with PCI if it was a standard around when Zorro-III was being created, he just gets to "make it right".
Has anything changed since August 2015? Making a Buster replacement for big box Amigas almost seems like a step backward, or at least side ways, from a replacement FPGA Amiga motherboard which Dave supported for the Amiga future. It would be different if the optimized buster logic could be used in an FPGA Amiga motherboard but it would likely be unnecessary as is with the Zorro slots disappearing. It would be great if Dave could be encouraged to get involved with one of the FPGA Amiga motherboard replacement developments as he is great for PR and motivation, he has insights and resources for some of the custom chip logic and his advice has been solid (C= didn't listen and they are bankrupt and Hyperion/A-Eon didn't listen and they are likely a tax deduction as well). The current FPGA Amiga developers could use more vision and planning for the future. Too bad they can't all work together for the next generation and mass produce very affordable hardware. Then again, it may be the politics and short sighted people he wants to avoid after experiencing the destruction of C=.
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Old 27 April 2017, 00:54   #43
grelbfarlk
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How do you think the Amiga hardware would look today if Commodore hadn't went bankrupt? How would the Amiga graphics system look? Would it be non standard and based on AGA/AAA or would it be more like SVGA? What about the bus system? And, last but least, what processor architecture could the Amiga have been using?

A: Well, itís hard to say everything for sure. But I can tell you this. In the fall of 1991, with Sydnes basically cancelling every project, I decided to sit down and design the next system architecture, the thing that would hopefully replace the A3000 design (used in all A3000/A4000 machines). This was called ďAcutiatorĒ, and fully modularized the architecture, so that graphics, for example, could be separate from sound and basic I/O. This originally used a custom bus I designed, called the AMI Bus (Amiga Modular Interconnect).

But then a funny thing happened: PCI came out. PCI was designed to solve the very same problem, and by the time Intel kicked it out to the PCI SIG and they improved it, it was way better than the AMI bus at a bunch of things. And also, it was likely to be this huge standard. Thatís a good thing....

See, thereís this misconception about C=/Amiga engineering and standards. We LOVED to use standards Ė any standard Ė as long as they did not suck. So you see all these proprietary buses and such around the Amiga, and figure, these guys hate standards. Not at all. We liked the good ones. PCI was a very good one, even then.

So, with all of that said, the next generation Amiga would have had a PCI bus. Also, probably, a PCI to Zorro III bridge. Graphics would have been on PCI. I had speced out PCI interface chips for AA and AAA subsystems, so the graphics could go on a card. Not at all cloning The PC; but the functionality is correct, to make these pieces modular if possible. Iíll let you say Iím copying the Apple ][ here is you like Ė after all, thatís what IBM did anyway.

There was a feature in Acutiator most systems simply donít have: the TPU, or Transfer Processing Unit. Any time you had a bus to bus interface, you would (ideally) have a TPU there, in the chip that did that bus to bus interface. This was a very simple 32-bit microprocessor (I designed the architecture) which would transfer data, efficiently, from bus to bus. It would so largely because it understood, perfectly, both of the buses at issue. So, no imposed wait states if there were synchronization issues, speed mismatch, etc. You could write directly to memory/IO on the far side of that bus, but better still, just drop a transfer instruction into the queue for a particular TPU, and it would run the transfer for you, then signal when done. The goal: every bus in the system could be busy, all at once.

Anyway, thatís the kind of things I had in mind for the system. For graphics, Hombre, as mentioned, and that was also PCI Ė Dr. Hepler also saw the wisdom in PCI, even as I did independently. Beyond that, itís questionable if Commodore would have remained in the graphics business. Most of the PC markers used to make their own graphics chips, too. Today, itís nVidia, ATi, Matrox, and few others. Like Intel, Motorola, and National Semiconductor, you only need so many different CPUs around.
Source:
http://www.landley.net/history/mirro...re/haynie.html

Related to nothing, but I liked this interview with him.
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