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Old 02 July 2014, 19:35   #161
OlafSch
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Originally Posted by JimDrew View Post
Mike purchased a slew of 060's and made a test fixture to make sure that they are not missing anything (common with knock offs from China). So, I would assume that Mike didn't do this to sit on them.

I have a developer daughter board myself, which is different from the 060 daughter board. Mike has a real job designing hardware and traveling all over the world sourcing components. With Wolfgang helping him with the ARM code and hardware layers, the progress has been speedy by comparison to Mike just tinkering over the years prior. Mike has hundreds of boards just sitting around doing nothing. That's a lot of money tied up that he would like to get back, and continue to profit from in the future with the production of new boards. The design is solid, and even though it is older, the FPGA is still large even by today's standards, so it's not outdated by any means.
"large" and "outdated" depend on your view... if you have really something to show then make another thread. This is about the new accellerators with Apollo core and not about FPGA Arcade
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Old 02 July 2014, 23:01   #162
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I pointed out in post #114 that Gunnar's statement was not correct, and that is how FPGA Arcade Replay was brought into this.
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Old 02 July 2014, 23:39   #163
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If the AGA chipset is put on an FPGA based accelerator board, 95% of the original OCS/ECS chipset becomes useless (16-bit Chip RAM is too slow for AGA DMAs).
Only the I/O related chips stay a little bit useful on the A500/A2000 PCB :
- Paula (Serial port, Joystick/Mouse)
- 8520s (Floppy, Parallel port, Joystick/Mouse, Keyboard)

Regards,

Frederic
Commodore probably consider at some point MC68000 with AGA but 32 bit CHIP bus is required to provide bandwidth.
But with connecting AGA to FPGA probably everything can be done in opposite side - i.e. CHIP bus no longer limitations for CPU especially when fast memory used.

Btw i doubt that any AGA system use different E clock than 0.7MHz - perhaps code in timer.device was designed for other system (future? CD32?).
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Old 02 July 2014, 23:42   #164
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CPU access to Chip RAM is still 16 bit though or not?
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Old 03 July 2014, 00:03   #165
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Originally Posted by pandy71 View Post
Commodore probably consider at some point MC68000 with AGA but 32 bit CHIP bus is required to provide bandwidth.
But with connecting AGA to FPGA probably everything can be done in opposite side - i.e. CHIP bus no longer limitations for CPU especially when fast memory used.

Btw i doubt that any AGA system use different E clock than 0.7MHz - perhaps code in timer.device was designed for other system (future? CD32?).
I have double checked the A1200 schematics and the E clock from Gayle seems to be at 700 KHz. The BOM also states "1 MHz VIA 8520".
Hardware docs on internet show that 2 MHz 8520 were only used on 1571 and 1581 floppy drives.
All the Amiga have the 1 MHz version. Sorry, my mistake.
It makes the conversion of ECS machines to AGA a lot easier.

Regards,

Frederic
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Old 03 July 2014, 00:08   #166
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CPU access to Chip RAM is still 16 bit though or not?
On AGA machines, the CPU has 32-bit access to Chip RAM (but still at 3.5 MHz).
But, Paula always does 16-bit access to Chip RAM for Audio and Disk DMAs.

Regards,
Frederic
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Old 03 July 2014, 09:40   #167
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On AGA machines, the CPU has 32-bit access to Chip RAM (but still at 3.5 MHz).
But, Paula always does 16-bit access to Chip RAM for Audio and Disk DMAs.

Regards,
Frederic
I think that 16bit access for Disk DMA and Audio is not drawback, as their amount of data per second is so small.

What really needs a lot of data are the planes and the Blitter.
With the FMODE update the planes get 4times the bandwidth - this is great!
The Blitter still is 16bit this is a bit of a sucker.
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Old 03 July 2014, 14:24   #168
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Originally Posted by FrenchShark View Post
On AGA machines, the CPU has 32-bit access to Chip RAM (but still at 3.5 MHz).
But, Paula always does 16-bit access to Chip RAM for Audio and Disk DMAs.

Regards,
Frederic
AFAIR on A3000 CPU have 32 bit access to CHIP where chipset use 16 bit bus - bus conversion is performed by bunch of TTL's (mostly 74646) - later this was converted to LSI (Budgie on A1200 and Bridgette on A4000 - http://en.wikipedia.org/wiki/Amiga_c...hips#Bridgette ).
So in theory AGA can be connected to 16 bit CPU bus but seem that even greedy Commodore abandoned such idea (IMHO it was never even prototyped). I found note about potential possibility to have MC68000 and AGA - see http://www.amigawiki.org/doku.php?id=dearts:bridgette ",as well as 68000 based Amigas with AA chip set."

But knowledge that E clock is automatically recognized by Kickstart sounds nice - i need to check and double it - maybe 1MHz 8520 will be sufficient to work with 40% faster clock (especially after rising slightly 5V).
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Old 03 July 2014, 19:09   #169
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maybe 1MHz 8520 will be sufficient to work with 40% faster clock (especially after rising slightly 5V).
Why would you want to clock the CIA faster?
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Old 03 July 2014, 19:55   #170
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That would break a LOT of apps that poke at the CIAs directly (like I always do), but I suppose anything that used the CIAx resources could be patched to work.
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Old 03 July 2014, 23:10   #171
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I think that 16bit access for Disk DMA and Audio is not drawback, as their amount of data per second is so small.

What really needs a lot of data are the planes and the Blitter.
With the FMODE update the planes get 4times the bandwidth - this is great!
The Blitter still is 16bit this is a bit of a sucker.
2x bandwidth on audio means 58 kHz sampling rate and on disk, direct HD floppy support without the 150 rpm drive hack.
AA Paula would have been useful...

Regards,
Frederic
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Old 03 July 2014, 23:21   #172
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2x bandwidth on audio means 58 kHz sampling rate
You don't need another PAULA for this.
All you need is more DMA slots.
On classic AMIGA you had 1 DMA slot per scan line.
If you selected 31Khz screen you doubled the scan lines.
With this setting even your 16bit Paula was able to play 56 kHz samples.

If you desing an upgrade chipset you would have more bandwidth then old ones anyway. So allowing PAULA mode scanlines is not a problem.
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Old 03 July 2014, 23:26   #173
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2x bandwidth could also have made 16 bit samples possible

incidentally can you use Copper to poke data directly into Paula's data register to get higher sampling rates?
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Old 03 July 2014, 23:29   #174
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2x bandwidth could also have made 16 bit samples possible

incidentally can you use Copper to poke data directly into Paula's data register to get higher sampling rates?

Do you talk about an A500 here or about an FPGA based system?
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Old 03 July 2014, 23:37   #175
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AFAIR on A3000 CPU have 32 bit access to CHIP where chipset use 16 bit bus - bus conversion is performed by bunch of TTL's (mostly 74646) - later this was converted to LSI (Budgie on A1200 and Bridgette on A4000 - http://en.wikipedia.org/wiki/Amiga_c...hips#Bridgette ).
So in theory AGA can be connected to 16 bit CPU bus but seem that even greedy Commodore abandoned such idea (IMHO it was never even prototyped). I found note about potential possibility to have MC68000 and AGA - see http://www.amigawiki.org/doku.php?id=dearts:bridgette ",as well as 68000 based Amigas with AA chip set."

But knowledge that E clock is automatically recognized by Kickstart sounds nice - i need to check and double it - maybe 1MHz 8520 will be sufficient to work with 40% faster clock (especially after rising slightly 5V).
Interresting stuff about brigette.
In the case of an accelerator + AGA in an FPGA, the whole chip RAM bus and the CPU/Chip bridge is anyway integrated into the FPGA.
Moreover, it is easier to stay with 16-bit Chip RAM bus and to increase the bus speed than to use a 32-bit bus.

As for the faster 8520 hack, if it does not work you will end up with a Guru right away

I have one question about Kickstart 3.1 : does the A500/A2000 3.1 ROM contain AGA routines in the graphics library ?

Regards,
Frederic
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Old 04 July 2014, 00:03   #176
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Do you talk about an A500 here or about an FPGA based system?
The first part about 16 bit samples, an imaginary Amiga with better sound capabilities.

The second part about using the Copper to poke data into Paula, can you do that on any real Amiga?
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Old 04 July 2014, 14:54   #177
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Interresting stuff about brigette.
In the case of an accelerator + AGA in an FPGA, the whole chip RAM bus and the CPU/Chip bridge is anyway integrated into the FPGA.
Moreover, it is easier to stay with 16-bit Chip RAM bus and to increase the bus speed than to use a 32-bit bus.
Yes, in theory but going this way - it is best to hook ECA/AGA directly to FPGA and reverse situation - with fast RAM (controller and arbiter in FPGA) almost all bandwidth can be dedicated to CPU, fraction of bandwidth used by chipset - im thinking currently about such machine.

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As for the faster 8520 hack, if it does not work you will end up with a Guru right away
My question was realted to two things - first SYBIL (mentioned by JimDrew) - never saw this device but based on functionality seems it is controlled clock source for whole Amiga - based on this it was possible to achieve variable datarate to read Macintosh floppies. But this is my speculation as i never found anything on SYBIL.
Second of course 68000 in pre Gayle systems where E clock is produced by CPU - if timer.device is capable to sense E clock value then no problems with 14MHz MC68000 (yes, i know - i can build clock generator as in Gayle and modify timing for Gary but then why not build remains things).

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I have one question about Kickstart 3.1 : does the A500/A2000 3.1 ROM contain AGA routines in the graphics library ?

Regards,
Frederic
No clue - not my area...

BR
PA

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The first part about 16 bit samples, an imaginary Amiga with better sound capabilities.
Ordinary Paula can be modified - there currently rarely used functionality where one channel can modulate amplitude/frequency or both for other channel but for amplitude modulation only half of samples is used - should be possible for example in new Paula to have possibility to combine two channels to form 16 bit samples.

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The second part about using the Copper to poke data into Paula, can you do that on any real Amiga?
http://eab.abime.net/showthread.php?t=65348

Not analyzed code but perhaps other possibility is put reasonable high sampling frequency then set pointer in memory to 1 word filled with null data - audio should be looped and played as usual however with CPU or more convenient with Copper (as timing is critical) feed from time to time real samples - this should work quite well also. Side effect is that probably audio level must be set as maximum to avoid distortions produced be volume adjust mechanism (seem it is PWM like).

Last edited by pandy71; 04 July 2014 at 15:02.
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Old 04 July 2014, 21:05   #178
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SYBIL used the genlock interface and generated the Amiga's clock externally. Other than the video output possibly being wiped out, the rest of the Amiga works perfectly at pretty extreme frequencies, both above and below the normal frequency.
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Old 05 July 2014, 20:30   #179
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Maybe it's a stupid question, but. will the new fpga board work ok with our zorro cards? Specially DMA ones (as I have a GVP scsi board installed :P)

Thanks!
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Old 06 July 2014, 18:19   #180
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Yes
and
Yes,
Phoenix supports some MOVEM variant which the old 68k did not.
Good.
I hope that you understand that for "movem.l $10(A5),A3-A6" command
I mean especially about A6 value (its readed from old or new A5 base).
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