First Amiga 600 FPGA Accelerator - Vampire 600

[NovaCoder]

Originally Posted by alexh

Thomas Hirsch has proved he is a good engineer (if a little quiet). Gunnar... not so much but in his favour he's certainly enthusiastic. They cannot however defeat the laws of physics or economics with good code alone. Cheap FPGA's (at this moment in time) are in my experience either too small or too slow for such capabilities. If they are getting good numbers then they are using an expensive FPGA (expensive = much more than €60 which is the cost of an 060)

Has any true information about their 680x0 clone been shared with anyone (i.e. the price of the FPGA containing the CPU on their board, the source code for their CPU, the FPGA synthesis and mapping reports and system speed numbers?)

All I've seen are snippets of specs, techniques and ideas which anyone reasearching the subject could put together in a few days. No hard evidence / substantial work/prices related questions.

Alex,

When do you think the price of right spec FPGA's will hit a low price-point, are we talking months or years?

If I look into my very murky crystal ball, I can see someone like Jens doing a nice FPGA accelerator in a few years time when the price of an FPGA is cheaper and faster than using the equivalent 'real' 030 chip. The 020/030 softcore is pretty much complete and should be open-sourced so that side of it won't be an issue.

[cosmicfrog]

Originally Posted by NovaCoder

Alex,

When do you think the price of right spec FPGA's will hit a low price-point, are we talking months or years?

I think thats a very good question, what are your thoughts alexh ? is FPGA the way to go or as inevitable happens something else comes along and makes it iether very cheap or obsalite or enables you to do the same but in a very different way but at a much cheaper price point.

[Loedown]

Originally Posted by cosmicfrog

I think thats a very good question, what are your thoughts alexh ? is FPGA the way to go or as inevitable happens something else comes along and makes it iether very cheap or obsalite or enables you to do the same but in a very different way but at a much cheaper price point.

I face these sorts of problems on a daily basis. Many old synthesizers use obsolete or hard to obtain parts and this is one of the problems in electronics where as soon as you use a non standard part or something that is custom made / designed this what happens.

CA3080A/E op amps and SEM chips are a good example.

[alexh]

Originally Posted by NovaCoder

When do you think the price of right spec FPGA's will hit a low price-point, are we talking months or years?

To hit the turbo-card price point of around £100 we are talking perhaps a generation or two. Depends on the new push in FPGA to include hard cores that may be of use to AoC (Amiga-On-a-Chip)

Enthusiasts with deep pockets can start developing now (as they already do) using £200+ FGPA's.

Originally Posted by NovaCoder

I can see someone like Jens doing a nice FPGA accelerator in a few years time when the price of an FPGA is cheaper and faster than using the equivalent 'real' 030 chip.

Not cheaper but certainly faster. The 030 chips are still pretty cheap as things go.

Originally Posted by NovaCoder

The 020/030 softcore is pretty much complete and should be open-sourced so that side of it won't be an issue.

I don't think that is true. But.... I've not been following Jakub's work since he started adding some 020 instructions to T68 for MiniMig AGA.

[yaqube]

Originally Posted by alexh

I've not been following Jakub's work since he started adding some 020 instructions to T68 for MiniMig AGA.

Tobias is responsible for 020 instruction set implementation. I have only found/fixed some bugs and added a cache to allow it to run at full speed.

[majsta]

The desing should work now but without memory... I stuck with sdram controller. As i can see there are some works implementing minimig to de1 and de2 boards but this cant help me. Is there any examples of connecting tg68 to memory controller. Is there anyone who can help.

[rkauer]

One archive in the zone for you.

[majsta]

Thank you but i dont see how this can help me.

[alexh]

Originally Posted by majsta

I stuck with sdram controller.

Stuck how? TG68 has a standard 68000 bus. You need to make a 68k->SDRAM bridge. Shouldn't take long. Couple of hours reading.

Originally Posted by majsta

As i can see there are some works implementing minimig to de1 and de2 boards but this cant help me.

Why not? Unless the SDRAM controllers used on those platforms utilise unique features of the FPGA's on those boards then they will be fine.

Originally Posted by majsta

Is there any examples of connecting tg68 to memory controller.

On a plate??

http://code.google.com/p/fpgagen/sou...en_top.vhd?r=2

[majsta]

Works about implementing minimig into de1 or de2 board are to complicated because it uses tg68 core, tg68_fast, also it emulates all amiga chips and then using minimig core to connect all of that. It has sdram controller but he is connected to minimig, and i thing that i dont need that.
About fpgagen i did some reading and for now this is the only thing that can help me.

[alexh]

Originally Posted by majsta

Works about implementing minimig into de1 or de2 board are too complicated because it uses tg68 core, tg68_fast, also it emulates all amiga chips and then using minimig core to connect all of that.

Many things will share the SDRAM controller in most FPGA's. CPUs and all DMA capable chips.

But that MegaDrive example is VERY simple. And you are going to make it even simpler. You only have TG68 connected to your SDRAM because it is FAST-RAM and all amiga chipset RAM accesses will use the existing A600 CHIP-RAM.

You can extract *JUST* the 68k SDRAM interface in minutes.

Just look at :
TG68_SDRAM_SEL
TG68_SDRAM_DTACK_N
TG68_SDRAM_D
TG68_A
TG68_UDS_N
TG68_LDS_N
TG68_DI
etc.

Look at the states in the SDRAM state machine :

SDRC_TG68_WR
SDRC_TG68_RD
SDRC_RFSH

You will of course have to expand the design as the Megadrive has a very small amount of RAM compared with an Amiga accelerator.

[majsta]

Yes, now i ll work on that and i ll report here what i did. Idea is to have open source basic code and working hardware design and then later on everyone with more knowledge then i have then work on codes. I m not software kind of person, i just want to have all signals connected in right order on prototype board. After i get vhdl code without any errors i need someone to check the code and i ll post it here.

[majsta]

It is very hard to extract all in right order, can you help in any way.

[majsta]

Ok work goes on, 10 times I have changed the design, and now i started over because I had lot of problems. And that is the main reason why did I not produce board yes. I need to slow down and solve many more things that i was unable to undersand some thime ago.
Here is PCB status, top of the board, bottom not shown, but it contains number of devices. As you can see not all devices are connected, that is because A600 dont use some signals from MC68000. From here now with this new design, accelerator can work

[majsta]

This is the 3D image of the latest design. Yesterady sent to PCB manufacturer. I m not happy with some parts of the design, but we will see this is only a test.

Top



Bottom

[Lord Aga]

Way to go
Bravo Majstore !
Uost !

[sanjyuubi]

I am just curious if FPGA core of TG68 is optimized to replicate all 68000 timing properly. If not, than a huge battle with
Gayle will arise. I tried to run 68EC020 in A600 but signal replication seems to be not enough and Gayle stops asserting DTACK after some time, propably original propagation times should be replicated as well, but time will show.

BTW, are you majsta the one asking me on email when to connect CLK pin of TG68?

[majsta]

Yes I ask you about lot of things. My philosophy is very different then anyone else. I place myself in position where I don't know anything about some topic and ask someone to explane it to me. Often asking stupid questions. Later on I find something useful in that explanation and use it with my knowledge to find better solutions for some of the problems. Sometimes only one word can drive me to the thinking and better understanding some situations.

[sanjyuubi]

With such philosophy as yours a strong will shall accompany as well, there will be many problems on your way and not everything could be solved remotely, not to mention that number of persons which know how to do it is very small. Wish you good luck anyway, dig into your project as long as you can. I think A600 i somehow more stricted in way of proper timings, in A500 you could overclock CPU and it worked, even PAK68 wchich doesnt replicate AS, UDS, LDS, DTACK etc in proper 68000 way is working ok.

[majsta]

Problem is that I designed PCB before 6 month and then I found out that there is no way to get my hands on the parts I used in the design, so I had to change design more then 10 times, and every time I changed the design I lost about 10 days to finish new one. Then I decided that I have chance to finish this using only items that I can find on Ebay so I searched for anything that I can use and I have managed to find all of the parts I need. Most of them I have and I ordered parts for large series of device boards so there is no way that I ll give up now. Also I had to find some company who will produce the PCB, but as I see it is going slow. You have to understand that I need working hardware and then I m gonna solve those problems If I can. PCB is in the production status, but as I say I ll need to wait 20 days or more to get my hands on the board. You have to understand also that I live in country where noone produces PCB, and where only parts you can finds are in some basement, that is the reason why I lost so much time for production. Here is 100 times harder to make something and all of you people just can't understand size of this project and all of the problems I need to deal every day. To make something in Bosnia it is mission impossible and that is why this project is greater then anything you may know. Either way I m starting web site about this and all other of my projects because I want everyone to see how hard I m working here for past 20 years and there is noone to see it. Be happy every day because you are not born here where I am. Only thing that I have is my word that I give to you all that I ll finish this project and this should be more than enough.