Need virtual memory for chip mem.

[Thorham]

Hi there,

Does anyone know of a virtual memory system which allows paging chip mem? The idea is to page the chip data to a ramdisk in fast memory. I've tried it with VMM, but that doesn't work (maybe I got it wrong somehow). Also, does anyone know if it's even possible with a Blizzard '030?

Thank you for your time.

[Toni Wilen]

Impossible. Custom chipset DMA bypasses CPU (and MMU) completely. It would not be "chip RAM" anymore.

[Zetr0]

@Toni

What trick do you use to allow WinUAE to have 4mb of chip, and could this be implemented in hardware in some way?

[Toni Wilen]

Originally Posted by Zetr0

@Toni

What trick do you use to allow WinUAE to have 4mb of chip, and could this be implemented in hardware in some way?

There is no trick. Real Agnus only have enough address lines to access 2MB RAM. Only solution is to create new Agnus chip with more address lines and increase size of DMA pointers. There is no other way.

"Virtual" Agnus can do anything you want it to do. DMA from fast RAM? Can do. DMA via MMU. Can do. "Only" need some programming

[Thorham]

Originally Posted by Toni Wilen

Impossible. Custom chipset DMA bypasses CPU (and MMU) completely. It would not be "chip RAM" anymore.

Thank you for replying.

I'm still curious though, how can the blizzards '030 bypass it's own mmu? Isn't chip mem simply part of the 4gig address space so that a mmu table can be setup to detect cpu chipmem access? Doesn't all this happen before the chipmem is accessed, or am I missing something completely?

Originally Posted by Toni Wilen

There is no trick. Real Agnus only have enough address lines to access 2MB RAM. Only solution is to create new Agnus chip with more address lines and increase size of DMA pointers. There is no other way.

Couldn't it be done by adding some sort of commodore 64 style memory bank switching?

[Toni Wilen]

Originally Posted by Thorham

Thank you for replying.

I'm still curious though, how can the blizzards '030 bypass it's own mmu? Isn't chip mem simply part of the 4gig address space so that a mmu table can be setup to detect cpu chipmem access? Doesn't all this happen before the chipmem is accessed, or am I missing something completely?

CPU memory accesses only. Custom chip/other DMA device accessing chip ram: CPU and MMU bypassed. (DMA = DIRECT memory access )

Couldn't it be done by adding some sort of commodore 64 style memory bank switching?

No.

[Thorham]

Originally Posted by Toni Wilen

CPU memory accesses only. Custom chip/other DMA device accessing chip ram: CPU and MMU bypassed. (DMA = DIRECT memory access )

Right. I was wondering why it couldn't be done with the cpu! But I hadn't thought of the other chips accessing chipmem. It means software can only page chipmem if it knows when the chip set is going to access it, which is impossible to know from an 'outside' program like vmm. Bah, what a shame

Thanks for explaining

[Thorham]

Sorry to bring this up again, but I just had to say something about the commodore 64 style bank switching.

Electronically this should be quite possible. There should be no reason why it's impossible to put some sort of bank switching hardware between chipmem and the custom chips. This system could then be used in a new os, or an os such as linux, which would have to be modified to use the feature. This system only has one drawback, and it's that the software has to know beforehand that a certain bank is going to be needed. This means it's difficult at best, if not impossible to make AmigaOs use the feature.

Now, I am 99% sure I'm right here So Toni, please don't be so quick to say no, when technically it's probably possible