Copper Bars

[Vortex]

Yeah, bit 9 is the master switch... "Main screen turn on"... "We get signal."

[pmc]

Watcha chaps.

After StingRay pointed out that my method of setting up a copper interrupt by banging the copper int vector directly fails on later Amiga models I've added a RetroLock(c) to my code.

It's now guaranteed to safely not work on anything higher than a 68000. Or your money back.

New routine with RetroLock(c) attached - once I understand properly what Sting's VBR stuff does, I'll replace the RetroLock(c) with a more friendly use of interrupt vectors.

[Vortex]

Here's my finding... I'm sure the experts will let us know when it's incorrect.. (which is great b.t.w., don't get me wrong!)

On 68000 machines the vectors to jump to exception routines always start at $0.
On 68+ machines this doesn't have to be the case. Putting the address of your interrupt routine in $6c (level 3 interrupt vector) can give unwanted result on anything else but 68000 machines. Vectors might as well have been moved to say $10000. In that case, address of your interrupt routine should be put in $1006c instead of $6c.

What Stingray's routine does is:

.GetVBR

move.l a5,-(a7) ; store a5 on stack
moveq #0,d0 ; Put 0, which is the default offset for the vector jumps in d0
move.l $4.w,a6 ; something with exex.lib
btst #0,296+1(a6) ; Is it 68010+ machine?
beq.b .is68k ; nope, branch to end of this routine
lea .getit(pc),a5 ; If it is 68+, load address of the -getit routine in a5
jsr -30(a6) ; And enter SuperVisor mode. This does some thingemabobs, including jumping to the .getit code.
; Once where back here, d0 contains offset for vectors.

.is68k move.l (a7)+,a5 ; Restore a5 from stack
rts

.getit
movec vbr,d0 ; Vector Base register to d0
rte ; back to user state code



Back in the main code, after the .GetVBR call d0 contains the offset.
it's moved to a0.
then, using $6c(a0) the right address for level 3 interrupt vector is used.




Or something like that...

[StingRay]

RetroLock sounds nice. The VBR stuff is actually not very complex, on 68000 the vectorbase always starts at $0 so the Lev3 vector would be $6c, Lev2 $68 etc. On CPU's > 68000 the vectorbase can be moved to fast ram so if you would change $6c.w to point to your VBI it would have no effect. Instead, you will have to read the address of the VBR (V.ector B.ase R.egister) and set your interrupts relative to this address, f.e. for a VBI it would be move.l VBRptr(pc),a0 move.l #MyVBI,$6c(a0). I'm doing this is my startup, just look for

	move.l	$6c(a0),.OldVBI-.VARS_HW(a5)
	lea	.NewVBI(pc),a1
	move.l	a1,$6c(a0)

and you'll see how it works.

Edit: posted at the same time as Vortex.

[pmc]

As always, thanks chaps.

From the explanations, it looks like I understood the code at a fundamental level cos that's more or less what I'd understood from the routine but the movec vbr,d0 was confusing me slightly.

Now I realise that movec is a new opcode not available on 68000 but is vbr a register on these higher processors - a bit like pc or sp for example? If so, does it therefore have to be moved with a movec?

Sorry - suppose I'm drifting this off into a conversation more about the way the 68020 works...

[StingRay]

Originally Posted by pmc

Now I realise that movec is a new opcode not available on 68000 but is vbr a register on these these higher processors - a bit like pc or sp for example? If so, does it therefore have to be moved with a movec?

VBR is a normal register that you can read and write. If you want to reset the VBR to $0 you could do a simple

moveq #0,d0
movec d0,VBR

Just make sure that you're in supervisor mode as movec is a privileged instruction.

[pmc]

OK cool. Thanks for explaining. Time to implement.

Well, it looks like RetroLock(c) has become the world record holder for the software that was useful for the shortest amount of time ever.

And before I'd even managed to license it and make my fortune.

[pmc]

I've finished my startup code now, including being friendly to systems with relocatable interrupt vectors.

Attached is a new startup version of my copperwave code which has been tested as working on A500, A500+ and A1200.

Big big thanks StingRay for all your assistance and patience for helping me get together a nice startup routine that I can use with all my code now going forwards.

You are the top man!

[Photon]

Originally Posted by StingRay

VBR is a normal register that you can read and write. If you want to reset the VBR to $0 you could do a simple

moveq #0,d0
movec d0,VBR

Just make sure that you're in supervisor mode as movec is a privileged instruction.

Remember to never use non-68000 code in startup code without first checking that you have a non-68000 CPU.

Also, for games/demos, SetPatch is normally used for compatibility, in which case you don't have to worry about the VBR.

But if you want your code to work OS-friendly on 'any setup', it's nice to not make the user run SetPatch just to see your stuff...

[StingRay]

Originally Posted by Photon

Remember to never use non-68000 code in startup code without first checking that you have a non-68000 CPU.

Check the code and Vortex' post (#43).

Originally Posted by Photon

Also, for games/demos, SetPatch is normally used for compatibility, in which case you don't have to worry about the VBR.

This is not true. You always have to care about the VBR if you bang the hw directly, i.e. AddIntServer is not used to install an IRQ handler. Some demos require that Setpatch is started due the to way they check for AGA chipsets.

[Photon]

Also see the last sentence, the one you didn't quote

SetPatch doesn't allow (or 'fix') that the (let's say) demo assumes VBR=0?

To assemble the movec command in 68000-only assemblers, use

dc.w $4e7b,$0801 for movec d0,VBR
dc.w $4e7a,$0801 for movec VBR,d0.

[StingRay]

Originally Posted by Photon

SetPatch doesn't allow (or 'fix') that the (let's say) demo assumes VBR=0?

No, Setpatch even relocates the VBR to fastmem. If you don't want to care about the VBR use system functions (AddIntServer f.e.) to install the IRQ, otherwise you'll need to take the VBR into account.