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Old 19 May 2018, 20:05   #41
SpeedGeek
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** 10TH NEWS UPDATE **

v1.8 Released!
- Reworked the code to eliminate a serious (but seldom noticed) data transfer corruption bug for the case of multiple DMA drivers in the same system. Special Thanks to Ralph Babel for his excellent knowledge on this topic.

Last edited by SpeedGeek; 19 May 2018 at 20:18.
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Old 21 May 2018, 17:53   #42
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** 11TH NEWS UPDATE **

v1.9 Released!
- Fixed "D2 Register Not Preserved" coding bug in PreDMA.
Most DMA drivers don't seem to need it preserved but
Thanks to Cosmos for reporting it anyway. Moved PostDMA
Nest count code to user section of code. This eliminates
any calls to Supervisor when the count is more than 1.
v1.9BR Added new "Experimental" code which should allow only
DMA targeted 16MB blocks of Fast RAM to change to Write
Through mode. This "In Theory" allows the other 16MB
blocks to remain in Copyback mode. This can only benefit
"Big RAM" systems with 32MB+ of Fast RAM and ONLY when
these systems run apps which use the extra Fast RAM.
WARNING: Use at you own risk!

CACHEDMABENCH:
v1.0 - First release
v1.1 - Fixed address and size bugs in FC loop code which
could have affected the results.
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Old 23 May 2018, 21:18   #43
starship
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A4000 - cyberstorm mk3 72mhz - 128mb fastram

Without Fastcache040

CacheDMAbench 1.1 ©SpeedGeek 2018
---------------------------------
Public memory CacheDMA FCs: 9500
Chip memory CacheDMA FCs..: 500
Total CDMA Function Calls.: 10000
Elapsed time Microseconds.: 393637

With Fastcache040

CacheDMAbench 1.1 ©SpeedGeek 2018
---------------------------------
Public memory CacheDMA FCs: 9500
Chip memory CacheDMA FCs..: 500
Total CDMA Function Calls.: 10000
Elapsed time Microseconds.: 113858
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Old 15 October 2018, 01:35   #44
NorthWay
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Quote:
Originally Posted by SpeedGeek View Post
FixMapP5 1.2 ©SpeedGeek 2018 (MMU Handler ©Michael Sinz 2001)
Well, running this tool only changes $F00000-$F80FFF to writethrough. The rest of ROM(copyback) and all of chipmem(imprecise) is unchanged.
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Old 15 October 2018, 15:59   #45
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Quote:
Originally Posted by NorthWay View Post
Well, running this tool only changes $F00000-$F80FFF to writethrough. The rest of ROM(copyback) and all of chipmem(imprecise) is unchanged.
That's interesting. Please specify your P5 library version and accelerator card. FixMapP5 only works after the P5 library is installed and it's possible that the firmware modifies the MMU mapping after FixMapP5 has been run (But I can't verify this on my A3660 system).
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Old 15 October 2018, 20:07   #46
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CS MK1 with 68060.library 46.15.

EDIT: And I use 'mmulist' by Michael van Elst(sp?) to look at the result.
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Old 16 October 2018, 16:54   #47
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With the 68060.library 46.15 I get the following (before and after FixMapP5) results:

Before:
Code:
Current 68060 MMU table setup:
$00000000-$00000FFF -> $07071000: Local  User  Valid   Read/Write Copyback
$00001000-$00003FFF -> $0705A000: Local  User  Valid   Read/Write Precise   
$00004000-$001FFFFF -> $00004000: Local  User  Valid   Read/Write Nocache 
$00200000-$00BBFFFF -> $0705A000: Local  User  Valid   Read/Write Precise   
$00BC0000-$00BFFFFF -> $00BC0000: Local  User  Valid   Read/Write Precise   
$00C00000-$00D7FFFF -> $0705A000: Local  User  Valid   Read/Write Precise   
$00D80000-$00E7FFFF -> $00D80000: Local  User  Valid   Read/Write Precise   
$00E80000-$00EFFFFF -> $0705A000: Local  User  Valid   Read/Write Precise   
$00F00000-$00FFFFFF -> $00F00000: Local  User  Valid   Read/Write Copyback
$01000000-$06FFFFFF -> $0705A000: Local  User  Valid   Read/Write Precise   
$07000000-$07059FFF -> $07000000: Local  User  Valid   Read/Write Copyback
$0705A000-$0705AFFF -> $0705A000: Local  User  Valid   Read/Write Nocache 
$0705B000-$07064FFF -> $0705B000: Local  User  Valid   Read/Write Precise   
$07065000-$07067FFF -> $07065000: Local  User  Valid   Read/Write Copyback
$07068000-$07068FFF -> $07068000: Local  User  Valid   Read/Write Precise   
$07069000-$07FFFFFF -> $07069000: Local  User  Valid   Read/Write Copyback
$08000000-$FFFF7FFF -> $0705A000: Local  User  Valid   Read/Write Precise   
$FFFF8000-$FFFFFFFF -> $07069000: Local  User  Valid   Read/Write Copyback
After:
Code:
Current 68060 MMU table setup:
$00000000-$00000FFF -> $07071000: Local  User  Valid   Read/Write Copyback
$00001000-$00003FFF -> $00202000: Local  User  Valid   Read/Write Precise   
$00004000-$001FFFFF -> $00004000: Local  User  Valid   Read/Write Precise   
$00200000-$00BBFFFF -> $00202000: Local  User  Valid   Read/Write Precise   
$00BC0000-$00BFFFFF -> $00BC0000: Local  User  Valid   Read/Write Precise   
$00C00000-$00D7FFFF -> $00202000: Local  User  Valid   Read/Write Precise   
$00D80000-$00E7FFFF -> $00D80000: Local  User  Valid   Read/Write Precise   
$00E80000-$00EFFFFF -> $00202000: Local  User  Valid   Read/Write Precise   
$00F00000-$00FFFFFF -> $00F00000: Local  User  Valid   Read/Write Cache   
$01000000-$06FFFFFF -> $00202000: Local  User  Valid   Read/Write Precise   
$07000000-$07059FFF -> $07000000: Local  User  Valid   Read/Write Copyback
$0705A000-$0705AFFF -> $0705A000: Local  User  Valid   Read/Write Nocache 
$0705B000-$07064FFF -> $0705B000: Local  User  Valid   Read/Write Precise   
$07065000-$07067FFF -> $07065000: Local  User  Valid   Read/Write Copyback
$07068000-$07068FFF -> $07068000: Local  User  Valid   Read/Write Precise   
$07069000-$07FFFFFF -> $07069000: Local  User  Valid   Read/Write Copyback
$08000000-$FFFF7FFF -> $00202000: Local  User  Valid   Read/Write Precise   
$FFFF8000-$FFFFFFFF -> $07069000: Local  User  Valid   Read/Write Copyback
I use a modified version the Enforcer MMU tool (because MMUlist is annoyingly slow and long). It's certainly possible that the P5 software (Rom2Fast, SetCacheMode, GuardianAngle, etc.) can change the MMU table setup after FixMapP5 so you may need to run it again if that's the case. Sorry, but the only permanent fix is to patch the P5 libraries.

P.S. The ROM mapping change to write-through is optional and won't affect system stability.
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