29 May 2020, 17:18 | #1 |
WinUAE developer
Join Date: Aug 2001
Location: Hämeenlinna/Finland
Age: 49
Posts: 26,507
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68040 CHK.L bug
Can anyone with 68040 confirm this strange bug:
moveq #0,d1 chk.l #$40000000,d1 moveq #1,d1 rts This code unexpectedly skips "moveq #1,d1" (d1 is still 0 when RTS is executed). It seems to jump over next word, any single word instruction after CHK.L gets skipped. But if CHK.L immediate value is for example #$20000000, it works correctly. My tester found this last year. There is many undefined differences between models but this appears to be real bug. (I can attach test executable later if needed) |
29 May 2020, 20:17 | #2 |
Registered User
Join Date: Oct 2009
Location: Germany
Posts: 3,303
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Confirmed here on A1200 Apollo 1240.
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29 May 2020, 22:46 | #3 |
Thalion Webshrine
Join Date: Jan 2004
Location: Oxford
Posts: 14,342
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I'd be curious to know if this bug is only in the XC68040 chips and not in the later MC68040?
Motorola CPUs usually gain MC status only if it has no bugs or they've all been documented. The MC68040 L88M mask of the 68040 was a very late rework and shrink. Unlike their XC counterparts they are cold to touch at 25MHz |
30 May 2020, 09:49 | #4 |
WinUAE developer
Join Date: Aug 2001
Location: Hämeenlinna/Finland
Age: 49
Posts: 26,507
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My 68040 is in Warp Engine and it has glued heatsink (not going to remove it).
68040 also seems to have another bug: RTR or RTE with odd PC in stack: address error stack frame SR is different than actual SR register contents at the start of address error handler. Stacked SR is SR before RTR modifications, real SR is correct. This bug isn't going to affect any normal code Last edited by Toni Wilen; 30 May 2020 at 10:02. |
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