Another ASM newbie...

[roondar]

I tend to use amigadev.elowar.com for my Amiga hardware info, as it has a complete HTML version of the HRM. Do note that the HRM does not contain AGA info.

However, the new BLTSIZV/BLTSIZH registers were added in the ECS chipset, so it does have info on them:

http://amigadev.elowar.com/read/ADCD...AA.html#line13

It says that the BLTSIZEH value is 11 bits for 32768 pixels. This means it goes up in steps of one word (i.e. 16 pixels).

[ross]

Originally Posted by DanielAllsopp

For the BLTSIZV/H is as simple as:

move.l #(h*bpls)<<16|(bpl/2),BLTSIZV(a6)

The table is wrong. Right table:

Address Locations: $38 $40 $48 $50 $58 $60 $68 $70 $78 $80 $88 $90 $98 $a0 $a8 $b0 $b8 $c0 $c8 $d0 $d8
 x1 fetch mode: SRT |   |   |   |   |   |   |   |   |   |   |   |   |   |   |   |   |   |   |   |STP
 x2 fetch mode: SRT |       |       |       |       |       |       |       |       |       |STP
 x4 fetcc mode: SRT |               |               |               |               |STP

DDFSTOP signal when there is one last fetch to do.
So $a0, $a8, $b0, $b8 are all good values if DDFSTRT is $38 and you want 5 fetch (64*5=320) in x4 mode.

A little warning for BPLCON1, probably you do not want to setup like this:

dc.w $102,$ff00

(playfield priority had nothing to do with it)
Set this way it moves the display to the very right due to AGA bits.

[DanielAllsopp]

This is all gold! Thank you very much!

[DanielAllsopp]

So reading the RKM and it's starting to make sense. What was throwing me was the 8 bits between address locations, and the fact it was doubled for the resolution.

Until I read this:

Recall that the hardware resolution of display window start and stop is twice the hardware resolution of data fetch

So I redid that table to help

Data Fetch:         0   8   16  24  32  40  48  56  64  72  80  88  96  104 112 120 128 136 144 152 160
DW Start/Stop:      0   16  32  48  64  80  96  112 128 144 160 176 192 208 224 240 256 272 288 304 320
Address Locations:  $38 $40 $48 $50 $58 $60 $68 $70 $78 $80 $88 $90 $98 $a0 $a8 $b0 $b8 $c0 $c8 $d0 $d8
 x1 fetch mode: SRT |   |   |   |   |   |   |   |   |   |   |   |   |   |   |   |   |   |   |   |STP
 x2 fetch mode: SRT |       |       |       |       |       |       |       |       |       |STP
 x4 fetch mode: SRT |               |               |               |               |STP

[DanielAllsopp]

I'm starting to pick back up on my ASM learning, and have found the following example in a document for setting an AGA colour register:

First clear bit 9 (LOCT) of BPLCON3
Move high nibbles of each colour component to colour registers
Then set bit 9 (LOCT) of BPLCON3
Move low nibbles of each colour components to colour registers

For example, to change colour zero to the colour $123456
   lea      (CUSTOM.L),a0
   move.w   #$0135,COLOR00(a0)
   move.w   #$0200,BPLCON3(a0)
   move.w   #$0246,COLOR00(a0)
   move.w   #$0000,BPLCON3(a0)

What I don't understand though, is the order in which those instructions are done. The text clearly states:

1. Clear bit 9 of LOCT in BPLCON3
2. Move high nibbles
3. Set bit 9 of LOCT in BPLCON3
4. Move low nibbles

but the example code, and the code which I have found to work correctly looks like things are done in this order:

1. Move high nibbles
2. Set bit 9 of LOCT in BPLCON3
3. Move low nibbles
4. Clear bit 9 of LOCT in BPLCON3

Can someone help me understand why that is please? Thanks

[hooverphonique]

Originally Posted by DanielAllsopp

1. Move high nibbles
2. Set bit 9 of LOCT in BPLCON3
3. Move low nibbles
4. Clear bit 9 of LOCT in BPLCON3
5. Move high nibbles
6. Set bit 9 of LOCT in BPLCON3
7. Move low nibbles

Can someone help me understand why that is please? Thanks

If you look from step 4 (I just repeated step 1-3), you will see that you did exactly the same (LOCT is 0 by default).

[DanielAllsopp]

Originally Posted by hooverphonique

If you look from step 4 (I just repeated step 1-3), you will see that you did exactly the same (LOCT is 0 by default).

Aha... thanks a lot! Now it makes sense

[mcgeezer]

Originally Posted by DanielAllsopp

Aha... thanks a lot! Now it makes sense

For a performance top tip clear LOCT in BPLCON3 then update all of your colour regs high nybbles... then set LOCT in BPLCON3 and set all of your low nybbles.

   BPLCON3,0000 
   COL0,$000
   COL1,$111
   COL2,$222
   COL3,$333
   COL4,$444
   BPLCON3,0200
   COL0,$888
   COL1,$888
   COL2,$888
   COL3,$888
   COL4,$888

Geezer

[DanielAllsopp]

Originally Posted by mcgeezer

For a performance top tip clear LOCT in BPLCON3 then update all of your colour regs high nybbles... then set LOCT in BPLCON3 and set all of your low nybbles.

   BPLCON3,0000 
   COL0,$000
   COL1,$111
   COL2,$222
   COL3,$333
   COL4,$444
   BPLCON3,0200
   COL0,$888
   COL1,$888
   COL2,$888
   COL3,$888
   COL4,$888

Geezer

Bloody marvellous. Thanks a lot for the tip!