29 September 2009, 17:27 | #1 |
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Weird instructions
During disassembly I've gotten some invalid opcodes that seem to be BTST or BSET with memory address operand and bit number bigger than 7. Can anyone confirm that the bit number is simply anded by 7 or something?
There's also a read from address $bfe0ff. That's the CIA address range, but those registers end in $000 or $001. Are the extra bits ignored, causing the instruction to read from $bfe001? |
29 September 2009, 17:51 | #2 | ||
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29 September 2009, 17:53 | #3 |
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Not sure about the CIA address range, but for the single-bit BSET, BCLR, BCHG and BTST with a memory address as destination you are correct.
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29 September 2009, 18:06 | #4 |
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Yes, internally it's "anded" by 7.
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12 October 2009, 16:54 | #5 | |
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So when a source says "btst #14,$dff002", the coder thinks he's accessing bit 14 of 16 in a word-size custom address. Which in fact he is, as he's accessing bit 6 in the byte at $dff002. Luckily, the bit number was >8, or it wouldn't work There are actually a whopping 8 bits to store the bit number in the instruction word, so even btst #254,$dff002 should work (if your assembler doesn't say "You shall not pass!") So actually, any disassembler that shows higher numbers than 7 or 31 is showing the truth and hasn't manipulated the instruction words. This means you can store data in the higher bits, if you feel like a cheeky devil About the CIA registers, well without looking in HRM, in OCS there's 16 odd and 16 even registers spaced out $100 apart, but I guess any address that fits that description should make the custom chips happy. |
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