BPLCON4 and DDF-registers (AGA)

[Toni Wilen]

Originally Posted by ross

So LACE bit in BPLCON0 is an autotoggle.

Yes. I think it was exactly 2 cycles before end of field LOF bit toggles if LACE bit is set. Thats all LACE bit does, it does not "enable" anything, at least not directly.

EDIT: In other words: short field length - 1 in VTOTAL is correct in interlaced modes. Technically also correct in non-lace modes if LOF bit is used to select between short and long. Of course nothing prevents you to set long field - 1 in VTOTAL and leave LOF cleared.

[dissident]

Originally Posted by ross

With all the (imprecise) information scattered everywhere i surely missed it.
You have a link?
So there is a reference to right value for HBxxxx?

Important AGA/AAA-information can be found in this tread: http://www.a1k.org/forum/showthread....+Architecture.

Just register at http://www.a1k.org/forum/forumdisplay.php?f=23 to become a member and then you can download the file "AAA_spec.pdf" at: http://www.a1k.org/forum/attachment.php?attachmentid=40656&d=1309986249
This is the file where I found the values for a programmed PAL display (Page 70 of 5.3 Interlaced NTSC and PAL Display Modes"

Or try this link for the AGA registers: http://coppershade.org/articles/Code...Register_List/

[ross]

Originally Posted by Toni Wilen

Yes. I think it was exactly 2 cycles before end of between short and long. Of course nothing prevents you to set long field - 1 in VTOTAL and leave LOF cleared.

Toni, the right sentence would be: "Of course nothing prevents you to set long field - 1 in VTOTAL and leave LOF set" (setting LACE=0 toggle LOF=1, the default behavior)
[and yes, You can set LACE=0 and force LOF=0 and set VTOTAL=max ]

The logic is: line count from 0 to VTOTAL+LOF (included)
so in laced mode the count was from ($0 to $137+0) and ($0 to $137+1) (312+313=625)

[ross]

Originally Posted by dissident

Important AGA/AAA-information can be found in this tread: http://www.a1k.org/forum/showthread....+Architecture.

Just register at http://www.a1k.org/forum/forumdisplay.php?f=23 to become a member and then you can download the file "AAA_spec.pdf" at: http://www.a1k.org/forum/attachment.php?attachmentid=40656&d=1309986249
This is the file where I found the values for a programmed PAL display (Page 70 of 5.3 Interlaced NTSC and PAL Display Modes"

Or try this link for the AGA registers: http://coppershade.org/articles/Code...Register_List/

Hi dissident, you can zone it or is a violation of some rule?

Thanks!
ross

[ross]

dissident, probably i've understood why You've been fooled by all this lace/LOF/VTOTAL stuff

You've launched your test from >3.0 WB and some laced video mode?
if You LoadView(null) and take over the system You can end-up with a short frame (312 line) active if previously on laced screen!

At first LACE=0 write the problem is gone, but if You count the number of lines first..

bye,

[dissident]

Originally Posted by ross

Hi dissident, you can zone it or is a violation of some rule?

Thanks!
ross

What do you mean with the verb "zone"? Are there any problems with your registration?

[ross]

Originally Posted by dissident

What do you mean with the verb "zone"? Are there any problems with your registration?

no, it's not a problem, but I felt 'wrong' to register just to download a file

The Zone:
http://eab.abime.net/showthread.php?t=26201

[dissident]

Originally Posted by ross

no, it's not a problem, but I felt 'wrong' to register just to download a file

The Zone:
http://eab.abime.net/showthread.php?t=26201

Why not? The file of this thread is for members only. And you want to use it, so the only way is to register there. I showed you the direct filelink, because this thread is in German thus to make it easier for you.
Anyway, feel free to introduce yourself in the english section of a1k.org and post something. People there might answer your questions, too.

[ross]

Originally Posted by dissident

Why not? The file of this thread is for members only. And you want to use it, so the only way is to register there. I showed you the direct filelink, because this thread is in German thus to make it easier for you.
Anyway, feel free to introduce yourself in the english section of a1k.org and post something. People there might answer your questions, too.

"Systemmeldung:
Lieber User, bis zum 01.04.2017 sind NEU-Registrierungen nicht möglich."

Trotzdem dankeschön dissident, ich habe keine eile

Tschüss!

[dissident]

Originally Posted by ross

dissident, probably i've understood why You've been fooled by all this lace/LOF/VTOTAL stuff

You've launched your test from >3.0 WB and some laced video mode?
if You LoadView(null) and take over the system You can end-up with a short frame (312 line) active if previously on laced screen!

At first LACE=0 write the problem is gone, but if You count the number of lines first..

bye,

No, I work with a standart non-interlaced hires WB-Screen on OS3.0/3.1/3.5. And here the LOF-Bit in VPOS is always set.

But you are right. I've tested it with WB 1.3. The LOF-Bit in VPOS is only set, if the WB-screen is really an interlace-screen.

[ross]

If You think that this thread is derailing to much i can open a new one.


Ok, got the table:

				NTSC            PAL
Parameter                AGNUS   ANDREA  AGNUS   ANDREA
              
BRSTSTART                  27      09C     27      09C  (Burst start)
BRSTSTOP                   30      0C0     30      0C0  (Burst stop)
EQU1STOP                   1C      070     1C      070
EQU2STOP                   8D~     236     8D      236
HSSTRTX                    12      048     12      048
HSSTOPX                    23      08C     23      08C
HBSTRTX                    08      020     08      020
HBSTOPX                    2B~     0AE     2B~     0AE
HCENTERX                   71~     1C6     71~     1C6
HTOTALX                    E3      38D     E3      38D
SER1STOP                           1D2             1D2
SER2STOP                           00C             00C
CLCNTR                             1CC             1CC
MLSYNC                             214             214
VBSTRT                             000             000
VBSTOP                             014             019
VSSTRT                             003            8002  (line 2 and 1/2)
VSSTOP                             006            8005  (line 5 and 1/2)
VTOTAL                             106 (525 half   138  (625 half
				        lines per        lines per
					field)           field)
VEQUSTART                          000             000  (hardwire, no reg.)
VEQUSTOP                           009 (line 9)   8007  (line 7 and 1/2)

Note: set the NTSC or PAL bit in BEAMCON0.
~ These events actually occurred the half count after that value.

Something strange here.
It can be something seen: occasionally the US documents have the wrong PAL values.

Why HTOTALX is the same in NTSC and PAL? (38D, PAL should be 38B)
How BRSTSTOP (colour burst ) can terminate after HBSTOP? (visible noise in line..)
The other values should be right for NTSC, for PAL i have some doubt...

Comments?
Bye,

[dissident]

Originally Posted by ross

If You think that this thread is derailing to much i can open a new one.

Please open your own thread. This theme gets more and more complex and has nothing to do with my start-theme.

[ross]

Originally Posted by dissident

Please open your own thread. This theme gets more and more complex and has nothing to do with my start-theme.

You are right, please accept my apology.

[dissident]

Originally Posted by ross

You are right, please accept my apology.

Apology accepted, ross.