WinUAE 2.8.0 beta series (Was 2.7.1)

[Toni Wilen]

Read following instructions before posting http://eab.abime.net/showpost.php?p=861456&postcount=1

2.7.1 (or possibly higher) beta series. Lots of A500 cycle-exact improvements and chipset corner cases fixed. (Thanks to amilo3438 for collecting huge amounts of demo test cases)

http://www.winuae.net/files/b/winuae_2710b1.zip


Huge changelog, mostly technical stuff.

- Setting blitter channel mode to D only from D + any other channel(s) combination when blitter was active caused blitter emulation to repeat D write until BLTSIZE was written again. (Sinemania / Latex)
- Blitter was not fully synced with bitplane DMA. When CPU had nothing to do (waiting for memory fetch or had long internal operation executing), blitter and bitplane DMA was emulated in separate passes. Optimization which is not that good idea in cycle-exact modes. Fixes glitches in most demos with vertical "copper" bars.
- "Blitter: D-channel without nothing to do?" can happen if program changes channel mode on the fly from D to AD, do not cancel blit in this situation. (Just Another Compilation / Magnetic Fields)
- Blitter's last idle cycle before final D write does not require free bus cycle. Exception: it needs to be free if it is extra cycle added in fill mode. (Lets Rave / Profecy, CrazyWorld / Dioxide)
- D-only blit didn't set blitter finished state early enough. Blitter finished bit is set, in normal mode, after second to last D write is done, not when blitter pipeline is empty and final D is written. (Bob demo / D-Mob)
- Blitter line mode timing updates, blit finished bit gets set immediately when last D write has been done but copper waiting for blitter needs 4 extra cycles and they don't need to be free cycles. I assume these 4 extra cycles are same as non-line mode 2 extra cycles + line mode forcing blitter to use only every other cycle. (Matches logic analyzer results but this is not easy to 100% confirm)
- Writing to blitter pointer register 1 cycle before same blitter channel is used for DMA fetch: written value is ignored, pointer does not change. Cycle exact mode only. (Rampage / TEK music corruption in Credits and Acknowledgements part, corrupted when landscape part started)
- Blitter not in nasty mode: idle cycles (that are usable by CPU) incorrectly counted as "CPU waits for bus".
- Blit without D-channel active in cycle-exact mode: final cycle still used D channel. (Oops..)

- When copper was stopped by writing to both COPxJMP registers while DMA was also disabled, it incorrectly was set to strobed state if yet another COPxJMP access was done with DMA still being disabled.
- Emulated quite weird copper feature, if second cycle of copjmp strobe cycle sequence would cross scanlines (positioned immediately after first strobe/refresh slot), it will disappear! (Psycho Medium 4 / Turnips)
- New undocumented feature: bitplane DMA and sprite DMA is inhibited during last line of field. (A500 logic analyzer confirmed, no difference between OCS or ECS)
- DDFSTOP > maxhpos causing full horizontal overscan DMA (ECS only) improved. (Child's Play 1 / Silicon Ltd)
- "SWIV" bitplane feature was line based, now it is cycle-based. (No one has enabled or disabled it mid-scanline, but at least emulation is more compatible now)
- If number of bitplanes decreases mid scanline, possible remaining data (BPLCON1 non-zero) in disabled planes' shift registers must be shifted out. (Party Report / Escape & Outlaws)
- Optimized "SPEEDUP" bitplane emulation didn't copy last fetched data to BPLxDAT storage variable, causing random glitches in other parts of display if program changed number of planes after DDFSTRT had matched. (Plasma Explosion / Timex)
- Bitplane delay (BPLCON1) mid-scanline timing should be now 100% exact. (Psycho Medium IV / Turnips)
- Sprite update in 270b13 was wrong, should work better now, it broke Elfmania scoreboard.
- Modified interrupt delays, handle situation where (broken) program starts blitter with INTREQ already set and blit finishes before next instruction clears it. (Absolute Inebriation / VD "big double glenz" part)

- Reset color registers only after hardware reset.
- It seems ECS Denise color palette is full white after power up but full black if OCS. (Small Intro / TWW)
- Reading byte from CIA address that has valid CIA A/B select bit but bit 0 inverted (Active 8 bits of 16-bit data bus not driven by CIAs) didn't read prefetch buffer contents in 68000 CE/prefetch mode. (Copper Bandwaggon / New Age)
- 68020 CE mode 6888x exceptions didn't skip instruction prefetch, broke for example KS 1.3 FPU detection.
- 68020 CE last prefetch word load after branch or exception used incorrect (too fast) non-ce fetch call.

- MSVC 2013 compiled, switched to fastcall calling convention.
- Added optional gameports panel setting: don't disable original key if it is mapped to keyboard joystick emulation. Config file only, joyportXkeyboardoverride=false (X=port number).
- Added "delay <fields>" command to custom event strings. (for example "kbr 'a'" "delay 50" "kbr 'b'" will send key 'a', wait 1 second (in PAL mode), send key 'b'. Multiple delayed custom events can be active at the same time.
- Accept Draco Casablanca partition table identifier (CDSK instead of usual RDSK).
- 256k rom image inserted in floppy drive: mount as A1000 KICK disk, 512k rom image mounts as A3000 SuperKickstart disk (with 256k rom area empty and no bonus code included = useless for A3000 emulation)
- Resolution autoswitch was not compatible with new interlace scanline modes.
- Resolution autoswitch improved, instead of being boolean (on or off), now it can be configured for percentage of resolution used, for example if value is about 10 or larger, and game has tiny hires scoreboard and the rest is lores: lores will be selected. Value=1 emulates old behavior, use highest resolution if there is even single line of hires or shres mode.
- Some Game Ports panel remap operations didn't work correctly if Input panel was set to "Configuration #1-#3"
- Automatically focus debugger window when debugger activates.
- Capture mouse after exiting debugger if it was captured when debugger was activated.
- Do not ask for extended ADF if program writes to disk using standard dos format and 1 or more sectors have non-zero header data, add message to load and ignore sector header data. (Thrill Kill disk writing)
- Standard partition HDF zero or -1 dostype: force DOS\0.
- <= 512M partition hardfiles had IDE-like geometry if it didn't have OFS or FFS filesystem.
- Always mount all non-CDROM SCSI devices if uaescsi.device is enabled and SCSI mode is SPTI.
- More readable crash dump file naming, 64-build dump file support added.
- Mouse driver mode + magic mouse lost mouse buttons when WinUAE window focus was lost.
- RTG mode + Aspect ratio not default or automatic + Scale if smaller set: screen was very narrow.
- DMA debugger blitter color changed, now normal blit, fill blit and line blits are different enough.

- JSR and JMP (d8,PC,Xn) or (d8,An,Xn) addressing modes did one unneeded prefetch.
- MOVE from SR was too fast if destination was memory (68000 does memory write twice for some reason)
- SR/CCR modification instructions always do full prefetch fill.
- (d8,PC,Xn) and (d8,An,Xn) addressing modes have idle cycle before first prefetch, not after.
- CMP.X #imm,EA where EA = -(a0) or (d8,An,Xn) didn't have extra idle cycle.
- Logic analyzer rechecked and updated exception initialization times. (Some were 2 cycles too fast)
- DIVU/DIVS cycle count algorithm had prefetch included: division operations were always 4 cycles too slow.

- Arcadia support synced with MAME 0.152 (ar_xxxx.zip rom images), missing bios roms and games added. Old rom files not supported. Note that Arcadia is NTSC, new bios 4.00 hangs in PAL mode. ROM rescan required to detect new files.

[FrodeSolheim]

Wow, this is an impressive number of compatibility updates Hats off for the great work (and to amilo3438 too!).

[Toni Wilen]

List may be impressive but most users will notice no difference whatsoever, 99.9% of games don't do very stupid things, only some demos do it

[1time]

Thanks a lot for the update. For me demos is more important than the games so i like it =)

Nice, keep up the great work! :-)

[mark_k]

Originally Posted by Toni Wilen

- New undocumented feature: bitplane DMA and sprite DMA is inhibited during last line of field. (A500 logic analyzer confirmed, no difference between OCS or ECS)

That change has caused a small problem with interlaced modes. It seems there you blank the last two rows. With text overscan set to maximum (241 lines for NTSC), while a non-interlaced Workbench screen is fine, an interlaced one is missing the bottom row of pixels (black shadow line of the Workbench window is missing at the bottom of the screen).

[Arnie]

Cadaver Demo (The Gate) WHDLoad, now works from A600 quickstart config, (previously only worked from A1200 quickstart config)

[Toni Wilen]

Originally Posted by mark_k

That change has caused a small problem with interlaced modes. It seems there you blank the last two rows. With text overscan set to maximum (241 lines for NTSC), while a non-interlaced Workbench screen is fine, an interlaced one is missing the bottom row of pixels (black shadow line of the Workbench window is missing at the bottom of the screen).

It is OCS/ECS confirmed, perhaps this hardware feature was fixed in AGA (and emulation should only do this if OCS/ECS, need some more tests).

I just ECS re-tested by booting OS3.9 with A3000, set interlaced max overscan, last scanline is blank.

This needs to be emulated, there is at least one demo that sets display ending vertical line higher than last line, waits for last line, starts doing some copperlist modifications, if display DMA is not disabled, DMA will steal cycles from CPU and code will take too long and display has glitches..

[losso]

Great work! Among everything else, this feature alone:

- Automatically focus debugger window when debugger activates

…will save me from having to grab the mouse soo many times in the future! Thanks for noticing and implementing this!

[turrican3]

if i could propose something :
if we use quickstart cd32, cd32 pas should be set by default ??
I notice something strange, if i launch a pc game during the same time than winuae7.1 (quickstart cd32 bestcomp) lotus 1 (lotus trilogy) just crash at the first level ??!!
I will give others explanations if needed tomorrow. (i didn't had the time to test more further)
Because you'll surely need your crystal ball ???

[Toni Wilen]

Originally Posted by turrican3

if i could propose something :
if we use quickstart cd32, cd32 pas should be set by default ??

No (assuming pas = pad). Quickstart only sets internal hardware config, controller selection (host config) is user choice. (no controller, cd32 pad, standard joystick or even a mouse)

It probably should (from user point of view) but it would be annoying special case, host config shouldn't be modified.

I notice something strange, if i launch a pc game during the same time than winuae7.1 (quickstart cd32 bestcomp) lotus 1 (lotus trilogy) just crash at the first level ??!!
I will give others explanations if needed tomorrow. (i didn't had the time to test more further)
Because you'll surely need your crystal ball ???

You surely need to post it in separate thread and possibly game hates keyboard input or something similar.

[emufan]

Originally Posted by Toni Wilen

- MSVC 2013 compiled, switched to fastcall calling convention.

winxp sp3 32 bit 2GB ram
i installed msvc 2013 runtime, nevertheless this version just crashes right after starting it. 2.70 final just runs fine.

edit: now installed msvc 2012 runtime, just in case, but still crashing.
btw. the log is really that short

[Toni Wilen]

Originally Posted by emufan

winxp sp3 32 bit 2GB ram

What is your full CPU model? (More specific than "pentium something").

[emufan]

Originally Posted by Toni Wilen

What is your full CPU model? (More specific than "pentium something").

[rare_j]

I'm using winxp sp3 32 bit 2GB ram, different (but still old) cpu.
2710b1 starts and works fine here.

[mark_k]

AMD Athlon XP doesn't support SSE2 instructions. Visual Studio 2012/2013 builds for SSE2 by default.

emufan: Take a look at the thread I posted a while ago about building WinUAE 2.7.0 with Visual Studio 2013. Download the archive and unpack it. If you run the SSE2 executable it will probably crash in the same way as the official 2.7.1b1. However, hopefully the SSE and x86 executables will work on your system. Do they?

If that is the cause of the problem, I suggest this (which might be a bit of a pain to set up initially):
- Add CPU type detection code to WinUAE, show a dialog box and quit if the CPU doesn't support the needed feature. That init code would be compiled for x86 to run on any CPU.
- For the final release installer, build x86, SSE, SSE2 (and maybe even AVX) executables. So as not to bloat the installer, use some kind of delta/patch system. The installer would contain one executable, then apply the appropriate delta to generate the best executable for the user's CPU. Maybe allow manual selection too?

[emufan]

rare_j: thanks, your a lucky owner of a SSE(1,2) machine - see below

Originally Posted by mark_k

AMD Athlon XP doesn't support SSE2 instructions. Visual Studio 2012/2013 builds for SSE2 by default.

... Do they?

they do, thanks for your experiments
the _sse_ and _x86_ versions do both work (speed and size versions) - sse2 and avx fails.

- For the final release installer, build x86, SSE, SSE2 (and maybe even AVX) executables.

good idea.

[Toni Wilen]

SSE2 was enabled by design, I wanted to know if there are CPUs without SSE2 still in use

Next version won't require it.

[emufan]

Originally Posted by Toni Wilen

SSE2 was enabled by design, I wanted to know if there are CPUs without SSE2 still in use

may happen this thing lasts for another decade, who knows

Next version won't require it.

ok

[Toni Wilen]

http://www.winuae.net/files/b/winuae_2710b2.zip

Beta 2:

- BPLCON1 mid scan line modifications now should match real hardware 100%.

This was very big change, old emulation was functionally close enough but very far from real hardware behavior. Old code couldn't emulate some side-effects correctly.

- Partial/full scanline based mode ("SPEEDUP") is again used more regularly, "is it safe to use" check got partially broken during 2.7.0 betas. It is also more optimal in AGA 32/64-bit fetch modes.
- AGA border sprite in right border and 2x or 4x horizontal sprite pixels (vs bitplane pixels): sprite's rightmost pixel(s) were missing.
- Superhires and top or bottom border sprite: graphics garbage was seen in border area, memory corruption was also possible in some situations.
- Magic mouse + mousehack mode now always stops keyboard input when mouse is outside of emulation window, even if window still has focus.
- 68020/030 CAAR register preserves also all reserved bits.
- Disable JIT if config has 68000/010 CPU and non-zero JIT cache size.
- 68020 CE broke interrupt state fetch, interrupt didn't clear if write to INTREQ was immediately followed by RTE. (b1)
- Does not anymore require SSE2 capable CPU (b1 did)