Expansion board for the CD32 - Page 46

Cylon · 23 July 2017, 22:41

@plasmab
Thanx for your efforts, very nice indeed. can't wait to get my sticky fingers on one of those boards...

plasmab · 23 July 2017, 22:46

Quote:

Originally Posted by Cylon

@plasmab
Thanx for your efforts, very nice indeed. can't wait to get my sticky fingers on one of those boards...

systest is showing an error on one bit in a one block of RAM.

I have a small issue with the refresh cycle. Seems the 020 does not have a big enough window of AS high to stick a refresh cycle in there. 6 Cycles vs 8 Cycle. Urgh

Amiga1992 · 24 July 2017, 17:36

I'm getting giddy with all this

alexh · 24 July 2017, 19:57

Quote:

Originally Posted by plasmab

I have a small issue with the refresh cycle. Seems the 020 does not have a big enough window of AS high to stick a refresh cycle in there. 6 Cycles vs 8 Cycle. Urgh

Interesting. But I don't understand? What does 680x0 bus cycles have to do with DRAM cycles? Is your DRAM controller partially driven directly by 680x0 bus signals?

plasmab · 24 July 2017, 20:04

Quote:

Originally Posted by alexh

Interesting. But I don't understand? What does 680x0 bus cycles have to do with DRAM cycles? Is your DRAM controller partially driven directly by 680x0 bus signals?

Of course it is. You time off the bus signal edges. All async ram does this AFAIK. Its working out how to inject refresh cycles that I'm finding annoying.

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plasmab · 24 July 2017, 20:35

Maybe the image will help.. traditionally with the 68000 you can shove a ram refresh cycle where AS20 is high. The space vanishes on the 68020.

The simulation above is a 68000 CPU model. I dont actually have a verilog/vhdl model with 020 timing available to use so ive been using the WF68000 model which is pretty good. On the 68020 the gap between lines B and C disappear so the ras never goes high following the CAS-before-RAS refresh.

plasmab · 24 July 2017, 23:44

All sorted.

Turns out I was trying to perform a CAS before RAS cycle when WE was asserted. Doh.

Will finish off the Rev 1 tomorrow... Will switch the 40 pin for a 44pin and update the silkscreen. then we're done

Will make the dirtypcbs link available to anyone who accepts that i've not tested the board before ordering it.

mattymuc · 24 July 2017, 23:48

You're awesome! I'm looking forward to soldering a test board

alenppc · 25 July 2017, 14:45

The 44 pin connector is available at digikey, part number S9025-ND

plasmab · 25 July 2017, 23:42

Quote:

Originally Posted by alenppc

The 44 pin connector is available at digikey, part number S9025-ND

Rerouted the IDE this evening... what a pain.

Double checking that pin 44 is grounded.

plasmab · 27 July 2017, 00:11

OK. TF328 rev1 has been ordered. Changes are.

44pin IDE (check)
Added missing pins.. (PUNT/A19) (check)
Added JMP NMI feature (Check).
Updated the silkscreen so people can actually have a hope of building it .. (check).

Anyone very very interested in trying this before i test is PM me and i'll give you a dirtyPCBs link.

PS: I am using fast DHL shipping so should have it in about a week.

E-Penguin · 27 July 2017, 00:28

Quote:

Originally Posted by plasmab

Turns out I was trying to perform a CAS before RAS cycle when WE was asserted. Doh.

Well that was going to be my first suggestion!

I've seen people say that putting fast memory in the CD32 will break existing games. Is there some cunning hardware fix that could be done to prevent this? (eg, press a button on boot) Or a dumb solution like a jumper which disables the fast mem?

plasmab · 27 July 2017, 00:33

Quote:

Originally Posted by E-Penguin

Well that was going to be my first suggestion!

I've seen people say that putting fast memory in the CD32 will break existing games. Is there some cunning hardware fix that could be done to prevent this? (eg, press a button on boot) Or a dumb solution like a jumper which disables the fast mem?

I've seen people say a heck of a lot of things. Especially in the Amiga community. IDE needed a CIA according to some.

I've not put anything fancy on this board UI wise. But if people prove to me a games dont work with fast memory i'll add it. Or they can take the sources and add the features themselves... Will be open source.

th4t1guy · 27 July 2017, 04:45

Quote:

Originally Posted by plasmab

I've seen people say a heck of a lot of things. Especially in the Amiga community. IDE needed a CIA according to some.

I've not put anything fancy on this board UI wise. But if people prove to me a games dont work with fast memory i'll add it. Or they can take the sources and add the features themselves... Will be open source.

I can verify that FASTMEM at least breaks Chaos Engine (NTSC version).
But if you have that and IDE, there's not much point in loading games from CD anymore.

Amiga1992 · 27 July 2017, 04:48

Quote:

Originally Posted by th4t1guy

I can verify that FASTMEM at least breaks Chaos Engine (NTSC version).

But if you have that and IDE, there's not much point in loading games from CD anymore.

There is a lot of point. CD games don't convert fully to WHDLoad install many times, for example, by losing CD audio. I prefer CD32 versions over any other versions 99% of the time.

I think a disable switch is a must. Just disable the whole deal, no need to selectively disable RAM or IDE.

dalek · 27 July 2017, 05:22

See "RAM Effects" here: http://www.amigareport.com/ar224/p1-11.html apparently there is another game "Pirates Gold" affected.

It also mentions "Degrader" and perhaps nofastmem would work if you can launch those games from the CD from workbench. Oh and there are CD32 WHDLoad slaves available for those games, so meh

It mentions a ram disable jumper on the CD32 but I reckon that's wrong and it's on the SX-1 instead.

NovaCoder · 27 July 2017, 07:08

Quote:

Originally Posted by Akira

I'm getting giddy with all this

I'm already giddy

This all looks very promising though, about time the CD32 got some love

Amiga1992 · 27 July 2017, 07:10

Quote:

Originally Posted by dalek

Oh and there are CD32 WHDLoad slaves available for those games, so meh

With no CD audio. Meh.

Quote:

Originally Posted by NovaCoder

This all looks very promising though, about time the CD32 got some love

Maybe we can have some CD32 project from you with these expansions?

SCUMMVM CD32?

plasmab · 27 July 2017, 07:44

Its easier to do a fast mem disable in software. Cant someone add it to a startup sequence

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plasmab · 27 July 2017, 07:48

That said. There is a jumper to select the clock on the cpld. Remove that and you get no ram or ide.

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27 July 2017, 00:11	#911
plasmab Banned Join Date: Sep 2016 Location: UK Posts: 2,917	OK. TF328 rev1 has been ordered. Changes are. 44pin IDE (check) Added missing pins.. (PUNT/A19) (check) Added JMP NMI feature (Check). Updated the silkscreen so people can actually have a hope of building it .. (check). Anyone very very interested in trying this before i test is PM me and i'll give you a dirtyPCBs link. PS: I am using fast DHL shipping so should have it in about a week. Last edited by plasmab; 27 July 2017 at 00:22.

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23 July 2017, 22:41	#901
Cylon Registered User Join Date: Oct 2014 Location: Europe Posts: 471	@plasmab Thanx for your efforts, very nice indeed. can't wait to get my sticky fingers on one of those boards...

24 July 2017, 17:36	#903
Amiga1992 Registered User Join Date: May 2001 Location: ? Posts: 19,645	I'm getting giddy with all this

24 July 2017, 20:35	#906
plasmab Banned Join Date: Sep 2016 Location: UK Posts: 2,917	Maybe the image will help.. traditionally with the 68000 you can shove a ram refresh cycle where AS20 is high. The space vanishes on the 68020. The simulation above is a 68000 CPU model. I dont actually have a verilog/vhdl model with 020 timing available to use so ive been using the WF68000 model which is pretty good. On the 68020 the gap between lines B and C disappear so the ras never goes high following the CAS-before-RAS refresh.

24 July 2017, 23:44	#907
plasmab Banned Join Date: Sep 2016 Location: UK Posts: 2,917	All sorted. Turns out I was trying to perform a CAS before RAS cycle when WE was asserted. Doh. Will finish off the Rev 1 tomorrow... Will switch the 40 pin for a 44pin and update the silkscreen. then we're done Will make the dirtypcbs link available to anyone who accepts that i've not tested the board before ordering it.

24 July 2017, 23:48	#908
mattymuc Registered User Join Date: Jul 2017 Location: Munich / Germany Posts: 88	You're awesome! I'm looking forward to soldering a test board

25 July 2017, 14:45	#909
alenppc Registered User Join Date: Apr 2012 Location: Canada Age: 44 Posts: 910	The 44 pin connector is available at digikey, part number S9025-ND

27 July 2017, 05:22	#916
dalek Registered User Join Date: Nov 2014 Location: NSW/Australia Posts: 462	See "RAM Effects" here: http://www.amigareport.com/ar224/p1-11.html apparently there is another game "Pirates Gold" affected. It also mentions "Degrader" and perhaps nofastmem would work if you can launch those games from the CD from workbench. Oh and there are CD32 WHDLoad slaves available for those games, so meh It mentions a ram disable jumper on the CD32 but I reckon that's wrong and it's on the SX-1 instead.

27 July 2017, 07:44	#919
plasmab Banned Join Date: Sep 2016 Location: UK Posts: 2,917	Its easier to do a fast mem disable in software. Cant someone add it to a startup sequence Sent from my iPhone using Tapatalk

27 July 2017, 07:48	#920
plasmab Banned Join Date: Sep 2016 Location: UK Posts: 2,917	That said. There is a jumper to select the clock on the cpld. Remove that and you get no ram or ide. Sent from my iPhone using Tapatalk

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