20 August 2016, 00:59 | #81 | ||
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The fact is hint bits doesn't help much, only for startup (first time a branch is seen) where a static prediction fails (backwards taken, forwards not taken). After it have been noticed by the branch predictor the hint doesn't matter anymore. The saving is in other words 1x branch mispredict penalty for cold code where branches doesn't follow the normal static prediction pattern. To compare to some modern high-performance processors: some doesn't even do static prediction according to the branch direction, they just assume a never seen branch will not be taken. In other words some designers doesn't even think static predictions are worth the effort even though this have much higher overheads (e.g. one misprediction per loop). Quote:
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01 September 2016, 13:04 | #82 |
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maybe instead of introducing new user-mode instructions that existing software won't use, existing compilers/assemblers don't support &c... (plus what if someone else produces a competing 68k implementation? there is no guarantee they will respect your extensions)
How about just introducing support for more than one hardware thread, either by hyperthreading or dual-core. Instructions to support this could be supervisor-mode only so not affecting most developers (at least not OS-friendly ones!) An operating system patch would be required to take advantage of it, but then all existing software can benefit from improved multitasking performance. |
01 September 2016, 13:36 | #83 | |
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What you are asking for here is called SMP and the OS is simply not adapted to this. |
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01 September 2016, 20:28 | #84 | |
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As for SMP, well maybe it need not be fully-symmetric multiprocessing, perhaps only one core/thread could be capable of supervisor mode thus the operating system itself would be restricted to single threaded operation, but since the OS already has programmer-abstracted multitasking (i.e. pre-emptive, not co-operative multitasking) how much trouble could it really cause if two user tasks or processes were running simultaneously on different cores? Not that i'm saying it would be a small feat. But really impossible? Eventually it will have to happen, if someone wants to bring 68k into the 21st century. |
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01 September 2016, 20:39 | #85 | |
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Quite a lot of trouble. Consider two programs accessing the same list, especially with inline versions of Forbid/Disable. |
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01 September 2016, 21:00 | #86 | |
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ok but when it is switching/scheduling tasks surely it is?
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01 September 2016, 21:23 | #87 | ||||
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When switching yes, when scheduling not necessarily. The OS goes into supervisor mode only when it is mandatory.
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Besides, the OS task lists are totally incompatible with multiple core - they're not designed for that at all. |
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01 September 2016, 21:59 | #88 | |||||
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While it's fruitful to think of all the problems i'm someone who prefers to imagine solutions. I'm just going to wait for a second opinion on this tbh because i'm a little out of my depth (but i'm a fast learner). |
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02 September 2016, 08:56 | #89 | ||||
son of 68k
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If you fancy rewrite the whole kernel, just do it
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The problem is Amiga specific. Quote:
All monitoring software expects the lists to be in the normal way, so it would break if the lists get changed. The only solution would be complete sandboxing of old apps. |
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02 September 2016, 11:49 | #90 | |||
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If there is specifically an Amiga problem, it must be because, either, the OS itself is doing something non-SMP-safe (which can be fixed, in principle), or the OS is so hands-off that individual apps are going above its head and doing things directly. I realise the latter case does happen. But not in every program, constantly. These must be specific use-cases that can be enumerated. Perhaps a more concrete example would help me understand. |
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02 September 2016, 12:29 | #91 | |||
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You just have to hope someone will rewrite existing system monitors to not break when handling tasks directly... Quote:
Apps are written with the assumption there is a single cpu in the machine. I can't give you a concrete example. But what i know for sure is that if something can go wrong, something will go wrong. Anyway do we really need SMP ? What would that bring us ? Other systems have it because 1) they are unable to multitask properly without it and 2) this is the only way to write higher performance numbers on the paper (and marketing likes these numbers). |
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02 September 2016, 12:54 | #92 | |||||
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Multicore exists because, single-thread instruction-level parallelism limit was reached, Gigahertz limit was reached, demand for faster processing didn't stop, but (thankfully) modern workloads are increasingly multi-threaded by nature. It doesn't just increase specs on paper. It also actually works. Although, before trying multi-core, i'd suggest hyperthreading, which is more-or-less equivalent to pre-emptive multitasking, with task switching every CPU cycle, so should create fewer problems (?) both for the OS and user programs. |
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02 September 2016, 13:25 | #93 | ||||||
son of 68k
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Your program is isolated in its own space and has no access to other programs space, let alone system structs. (Hey, wait. This is exactly what i told about when writing about sandboxing the apps...) Quote:
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What are they anyway ? This is what they wanted you to believe. But how to know, without any reference to compare with ? Do we have single core, single threaded multi-gigahertz cpus running on operating systems not smp aware ? Yes but this has a cost. Quote:
I even have some code that would break if task priorities were broken. |
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02 September 2016, 13:48 | #94 | ||||
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Accessing system structs might be more troublesome, but then again it always was. How many programs written for KS1.3 break on 3.1? Quote:
i'd like it. i don't "need" it. Quote:
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02 September 2016, 14:24 | #95 | |||
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The problem with running on several cores is that normal, simple concurrent access protections fail. And we're not supposed to use CAS, CAS2 instruction types on the Amiga (the manual says it, right ?) - so this ought to require some hardware modding as well (= not just changing the cpu with a simple trapdoor accelerator). Quote:
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On AmigaOS low priority tasks are always interrupted by higher priority ones. Or does some manual say otherwise ? |
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02 September 2016, 15:41 | #96 |
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You _can_ expand the task struct if you absolutely want to as was introduced with 2.x(3.x?). I have always forced that in my own Exec versions, and I don't know of any ill effect from what I have run.
It still doesn't help you with RMW operations that expect to be atomic when using a single cpu. You have to resort to MMU trapping access to the Forbid() semaphore and the interrupt register that Disable() touches to make sure you catch them all and can properly signal the other cpu(s). That will not be pretty... nor fast. Interestingly, a 68K FPGA implementation could be given special purpose hw to accellerate these special cases, but you still have the RMW problem. |
02 September 2016, 15:49 | #97 | |
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Many programs just use the size of 92 bytes to allocate new tasks and that would break ! |
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02 September 2016, 16:17 | #98 |
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;* Pointer to an extended task structure. This structure is allocated ;* by V36 Exec if the proper flags in tc_ETaskFlags are set. This ;* field was formerly defined as: ;* UWORD TC_TRAPALLOC ; traps allocated ;* UWORD TC_TRAPABLE ; traps enabled ;* Please see the Exec AllocTrap() and FreeTrap() calls. ;* APTR tc_ETask ; pointer to extended task structure Exec would be free to modify/extend the TC_ETASK struct for multi-cpu purposes, but that does not resolve non-atomic opcodes. |
02 September 2016, 16:46 | #99 | ||
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Anyway, extending the struct is something, however, what to put in some fields like execbase->ThisTask ? |
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02 September 2016, 18:30 | #100 | |
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I was testing per-task mmu tables. I changed the private structure to hold more info.
The change to Exec is, but the struct it points to is indeed not documented and definitely so intended not to be. Quote:
Anyone know what the OS4 devs are thinking, or what Jim Drew thought he could get away with back in the day? |
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