SX32 Pro RAM addresses

[mark_k]

Apparently WinUAE doesn't support all possible SX32 Pro RAM sizes. I took a lot at the SX32 ROM code. In case this isn't already known...

There are four byte-wide (what I assume are) memory controller registers at $E9E800 to $E9E803.

One channel/bank corresponds to $E9E800/1, the second to $E9E802/2. I guess both would be used for a double-sided SIMM.

$E9E800/1 affect memory which can appear at $14000000 to $17FFFFFF.
$E9E802/3 affect memory which can appear at $18000000 to $1BFFFFFF.

For emulation those registers can probably be ignored.

The second bank probably appears in $18000000 to $1BFFFFFF. There appears to be a bug in the ROM code: it does MOVE.L #$1C00000,D2 instead of MOVE.L #$1C000000,D2 (which would be the upper bound of the second region). However that *might* not be a problem in practice. The memory-test routine would probably stop when it reaches the mirror, assuming <=32MB in the second bank.

Those address space regions are probably mirrored, so e.g. 16MB in the first bank would appear at $14000000, $15000000, $16000000 and $17000000.

If you have 16MB in the first region and 8MB in the second (which probably wouldn't exist in real life), the ROM code would end up calling AddMemList() for the region $17000000 to $187FFFFF. It uses the uppermost mirror for the $14000000 bank and the lowest mirror for the $18000000 bank, so as to add one contiguous region. The memory is added with type MEMF_PUBLIC|MEMF_FAST|MEMF_LOCAL so probably doesn't disappear at reset.

[Toni Wilen]

Two bank SIMM configurations are not yet properly supported. Both SIMMs always have same size or only one is supported.

It won't happen until I know exactly how SIMM banking works because there are hardware that expect memory mapping hardware work correctly (like Blizzards). EDIT: some others assume specific type of mirroring.