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Old 11 December 2012, 14:37   #21
TheDarkCoder
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Quote:
Originally Posted by mark_k View Post
That wouldn't be an Agnus bug. The CPU should never be halted when the DMAF_BLITHOG bit is set and a blit is in progress, if it's running code out of true fast RAM (e.g. Zorro II fast RAM or $C00000 RAM on an A2000).

The CPU would be halted in that case if it's running code from $C00000 slow RAM as with an A500/A501 or B2000. Because Agnus treats CPU accesses to slow RAM the same as chip RAM.
ah, that's interesting. I didn't know that the $c00000 RAM in the A2000 is a "real" fast ram (I have read just now your explanation in the other thread).
So, to spot the Agnus bug it is only necessary that the code is not in chip ram. My A2000 has both the 512k at $c00000 and 2M of ZorroII ram.

Last edited by TheDarkCoder; 11 December 2012 at 14:58. Reason: my brain was disconnected
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Old 11 December 2012, 15:19   #22
mark_k
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You should hopefully be able to prove the $C00000 RAM is real fast by disabling your Zorro II RAM. Then open a 16-colour high-res screen and run a CPU benchmark program (which would load to $C00000 RAM). Compare the result with that of an A500/A501 or OCS B2000.
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Old 12 December 2012, 10:00   #23
TheDarkCoder
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Originally Posted by mark_k View Post
You should hopefully be able to prove the $C00000 RAM is real fast by disabling your Zorro II RAM. Then open a 16-colour high-res screen and run a CPU benchmark program (which would load to $C00000 RAM). Compare the result with that of an A500/A501 or OCS B2000.
How can I disable the RAM? It is installed in the A2091 hd controller.
I can malloc 2M, for instance. Is there any tool to do the job?

Another option is that I put in $c00000 ram (I think it's called ranger-ram) some benchmark code, for instance a memory copy loop.
I can compare against an A500+, I think it is a good comparison to show that A2000 ranger ram is faster
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Old 12 December 2012, 18:12   #24
mark_k
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An A500+ is chip RAM-only, but $C00000 RAM on an A500/B2000 is the same speed as chip so that's no problem. Run the test with each computer showing a 16-colour high-res screen (Bitplane DMA in that mode slows down CPU access to chip RAM a lot). Just running a benchmark program like SysInfo should show some difference, though that only uses an 8-colour screen. Or run something like a Mandelbrot fractal-calculating program with a 16-colour high-res screen.

If you have Kickstart 1.2/1.3 in your A2000, $C00000 RAM is used in preference to the Zorro II fast RAM anyway. So any program you write should load into $C00000 RAM if any is free. To make sure, if writing a benchmarking program in assembler, you could check the address that your routine loaded to. If not in $C00000 RAM already, use AllocAbs() to allocate some memory at $C60000 (say) then copy your routine code there before running it.

Commodore provided a utility called FastMemFirst/SlowMemLast to change the allocation priority so Zorro II RAM is used before $C00000 RAM. A500/A501 and B2000 users were advised to use that in their startup-sequence, otherwise the first 512KB of programs loaded go into slow-as-chip $C00000 memory, leaving the Zorro II true fast RAM unused. [So make sure to remove FastMemFirst/SlowMemLast from your A2000's startup-sequence before testing.]

Perhaps back when $C00000 "Ranger" memory support was added to Kickstart 1.2, it made sense to give it the highest priority because on the then-existing hardware (A2000 and I guess the "Ranger" board) $C00000 RAM was true fast RAM. But then the A500 and B2000 came along...

Update: Some internal RAM expansion boards for the Amiga 1000 (e.g. made by Spirit Technology) could have true fast RAM at $C00000 too.

Last edited by mark_k; 12 December 2012 at 18:27.
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Old 06 March 2013, 20:10   #25
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Thought I'd make a follow up post as I have since discovered that you must make the copper do two blitwaits to be sure of it waiting!

I noticed a glitch in one of my effect routines a month or so ago and finally got some me time to look at it this evening. None of my assumptions about what the problem was turned out to be true, but I then remembered removing the second blitwait from the copper I use to feed the blitter and, sure enough, it turned out to be one of the blitwaits that occurs directly after writing to bltsize was failing occasionally.

Knowledge gained and a nagging bug fixed - that's what I call a good day!

PS. This was happening on my A500 1.2 and A500+, so not just the old old hardware.
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Old 07 February 2014, 07:05   #26
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Paradroid, do you remember which effect this was in? When you found you needed 2 copper blitwaits, was there maybe 4 or more bitplanes active to steal the DMA cycles from the blitter?
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Old 21 May 2020, 19:07   #27
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Quote:
Originally Posted by Paradroid View Post
Thought I'd make a follow up post as I have since discovered that you must make the copper do two blitwaits to be sure of it waiting!
Hi! I'm playing around with copper driven blitter queue and want the minimal copper list. Seems you verifyed that 2 blitter wait are needed in the copper list?

Do you remind what of your fx showed the bug? My case is 3 bitplans, 320*256 screen, rendering 3bpl blitter bobs. I'm using two wait between each bob ( $00010000 ), but it would be awesome if I could remove one!

@toni is that potential bug emulated in WinUAE? ( at least my test is working fine in winuae with one only wait )
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Old 21 May 2020, 19:21   #28
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@toni is that potential bug emulated in WinUAE? ( at least my test is working fine in winuae with one only wait )
No because no one sent any test executables (and I also have never noticed any problems with single wait so it must be some special case).
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