16 July 2019, 20:23 | #21 |
Banana
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I couldn't get vasm to output the same output as was required by Blitz so I got out the hex editor and the motorola 68000 datasheet and edited the op code.
It now successfully adds a long's worth of BCD digits. Let's just say this has been a learning experience. For completeness I'm going to do the same for sbcd and nbcd then publish the library here. |
16 July 2019, 21:43 | #22 |
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VASM did OK using this procedure. I'm stunned the Blitz assembler is so fouled up.
Code:
** vasmm68k_mot -devpac -Fhunkexe -kick1hunks -nosym -o \bl.obj \bl.asm ** bl stands for blitz library ** Blitz wants executable despite the .obj name ** Put in otherlibs then run makedeflibs INCLUDE "\blitz2\Blitz.i" libheader 50,0,0,0,0 astatement args long,long,byte libs subs _AddBCD,0,0 name "AddBCD","Num1,Num2,Size" libfin _AddBCD: MOVE.l d0,a0 ; num1 in d0 to a0 ADDA d2,a0 ; increment a0 by the length of the string MOVE.l d1,a1 ; num2 in d1 to a1 ADDA d2,a1 ; increment a1 by the length of the string SUBI #1,d2 ; decrement the string length MOVE #$04,CCR ; clear the flags _AddBCD_loop: ABCD -(A0),-(A1) ; predecrement addresses, A0 = A0 + A1 DBRA D2,_AddBCD_loop ; decrement loop counter and go again if not zero RTS |
16 July 2019, 22:17 | #23 |
Banana
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Nice. Thanks for the tip; certainly simpler than going at it with a hex editor! Where did you find Blitz.i?
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16 July 2019, 22:29 | #24 |
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It's easier to paste here than remember where it came from.
EDIT 1&3: Archive URL where blitz.i originates in ZONE! http://aminet.net/dev/basic/BlitzASMInclud.lha EDIT2: These BCD bugs also exist in Amiblitz2. Double checked with WinUAE debugger and Blitz's own. Last edited by clenched; 01 September 2019 at 06:59. Reason: delete attachment |
18 July 2019, 20:29 | #25 |
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Blitz macros for inline BCD instructions:
Arg 1 - Mode Address or Data register. Any number would do, $a(ddress) $d(ata) just makes it easier to tell which is used. ie number is odd or even. Arg 2,3 - Register number 0-7. Code:
Macro _ABCD Dc.w `1 LSL 3-1 AND 8 OR `2 OR `3 LSL 9 OR $c100 End Macro Macro _SBCD Dc.w `1 LSL 3-1 AND 8 OR `2 OR `3 LSL 9 OR $8100 End Macro TST $100 JMP over ABCD -(a0),-(a1) ABCD d2,d5 SBCD -(a6),-(a3) SBCD d7,d1 RESET !_ABCD{$a,0,1} !_ABCD{$d,2,5} !_SBCD{$a,6,3} !_SBCD{$d,7,1} over: Stop 00338F6A 4ef9 0033 8f82 JMP $00338f82 00338F70 c10d ABCD.B -(A5),-(A0) 00338F72 c505 ABCD.B D5,D2 00338F74 8d0f SBCD.B -(A7),-(A6) 00338F76 8f01 SBCD.B D1,D7 00338F78 4e70 RESET 00338F7A c308 ABCD.B -(A0),-(A1) 00338F7C cb02 ABCD.B D2,D5 00338F7E 870e SBCD.B -(A6),-(A3) 00338F80 8307 SBCD.B D7,D1 |
22 July 2019, 09:09 | #26 | |
Banana
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It's still getting the registers wrong, no?
Quote:
*edit* Aah your macros are fixing the assembler output by directly calculating the op code. That's very clever! |
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22 July 2019, 15:43 | #27 |
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Same thing whittled down to two arguments. Looks a little less alien. The d's look almost real.
Code:
Macro _ABCD Dc.w {`1 BitChg 4 AND 16} LSR 1 OR {`1 AND 7} OR {`2 AND 7} LSL 9 OR $c100 End Macro Macro _SBCD Dc.w {`1 BitChg 4 AND 16} LSR 1 OR {`1 AND 7} OR {`2 AND 7} LSL 9 OR $8100 End Macro !_ABCD {$a0,$a1} !_ABCD {$d2,$d5} !_SBCD {$a6,$a3} !_SBCD {$d7,$d1} |
25 July 2019, 03:21 | #28 |
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Repairing BCD arithmetic
Edit Blitz2 as shown. Copy of Blitz2 is the original. This exchanges some bits and sets some to match similar ADDX,SUBX construction. Macro synthesizes source code to test the patch. If source is to be shared maybe better to stick to macros.
Comparing files C:\BLITZ2\Copy of Blitz2 and C:\BLITZ2\BLITZ2 00000F28: 90 0F 00000F29: 00 9F 000018F0: 90 0F 000018F1: 00 9F EDIT: Streamlined to eliminate edit test.txt step. Code:
; assemble: vasmm68k_mot -Fbin -o \test.txt \test.asm ; run test.txt in blitz ; assemble: vasmm68k_mot -Fbin \test.txt ; compare blitz.out and a.out, should be the same dc.b " rem",$0a dc.b 'l.l=WriteFile(0,"ram:blitz.out")',$0a dc.b "WriteMem 0,?strt,512",$0a dc.b "CloseFile 0",$0a dc.b "End",$0a dc.b " erem",$0a dc.b "strt:",$0a test macro dc.b " abcd.b -(a\<src>),-(a\<dst>)",$0a dc.b " sbcd.b -(a\<src>),-(a\<dst>)",$0a dc.b " abcd.b d\<src>,d\<dst>",$0a dc.b " sbcd.b d\<src>,d\<dst>",$0a endm src set 0 rept 8 dst set 0 rept 8 test dst set dst+1 endr src set src+1 endr Last edited by clenched; 02 August 2019 at 04:18. |
26 July 2019, 22:02 | #29 |
Banana
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It might be worth uploading that to aminet or similar as a patch, then hopefully it'll be widely adopted
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26 July 2019, 23:03 | #30 | |
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Quote:
abcd.b -(a0),-(a1) addx.b -(a0),-(a1) Now check that against what WinUAE debugger says. |
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