01 April 2022, 10:25 | #61 |
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@grond - what do you mean 68k instruction does more work? It doesn't. Moving registers, all math calculations - those instruction works the same. It makes difference in memory accesses due to segmented memory (different peripheral, external memory etc.) vs linear memory so it overall might take more x86 instructions to get the job done but that's not a great difference. Yes, AC68080 has impressive memory controller (why shouldn't it - it has support for memory several generations ahead of what 68k and Pentium had with EDO DRAM). And while it helps to reach results closer to the peak performance that peak performance isn't way ahead of what Pentium (MMX) could do.
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01 April 2022, 10:33 | #62 |
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01 April 2022, 10:36 | #63 | |
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Well this clearly just isn't for you, is it? Stick with what you have, but don't expect the rest of us to hang back with you. |
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01 April 2022, 10:47 | #64 | |
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It has more registers so it spends less efforts in swapping them around and can do more calculations directly. It has better addressing modes and much less constraints overall. As a result, even though individual x86 instructions are of same size and often even smaller, 68k programs are denser than x86 (for big programs x86 version can be 1.5 times bigger than 68k - compare them yourself if you don't believe me). In retro gaming there is the word 'retro', perhaps something you've missed. |
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01 April 2022, 10:50 | #65 |
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I mean exactly what it says. E.g. the 68k ISA has more powerful address modes than x86. For this reason the x86 needs to sometimes use two instructions where the 68k needs just one. The one 68k instruction does the same work of two x86 instructions and thus does more work than either x86 instruction.
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01 April 2022, 11:01 | #66 |
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01 April 2022, 11:01 | #67 | |
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01 April 2022, 11:23 | #68 |
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It's not irrelevant. A instruction cache of size X will hold more instructions if the code is denser increasing the likelihood of a cache hit. The same is true for bandwidth. If you can load X MB/s of instructions from RAM, you will load more instructions to be processed if the code is denser.
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01 April 2022, 12:00 | #69 |
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@grond - Pentium already had twice the cache of 060 and pentium mmx had 4x and also chipset cache (L2) which could be few hundreds KB. So... your point? And how much bigger is typical x86 code over 68k anyway? 68k only real advantage came with asm developers. And developers have little or no control over what comes to cache and when. By the time Pentium came out most PC apps were being compiled from high level language and with 95 using winapi, system libraries and abstraction layers. And there are system libraries and API for Amiga as well. ASM development is encouraged mostly to non-expanded amiga or timing critical routines.
Last edited by Promilus; 01 April 2022 at 12:12. |
01 April 2022, 12:05 | #70 |
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You may be talking about the 060 and the Pentium MMX. I am not. I was talking about the wrong comparison of the 080 to a Pentium 75.
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01 April 2022, 12:28 | #71 |
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Well I didn't go into "AC68080 is only P75 level" theme. I did however put Pentium-class and AC68080 together and I don't think I made mistake by that (arguments already presented). And x86 vs 68k asm number of instructions generated in typical usage makes small difference in size (when using rigid 4 bytes wide A32 of ARM obviously does, that's why Thumb-2 was conceived for microcontrollers which have little RAM and not that much FLASH ROM, also with RISC it really takes more instructions to make the same job as most/all RISC are unable to grab data out of the memory directly. It needs to be loaded up to registers first. Doesn't mean it takes a lot longer to execute - only that it takes more - very simple - instructions to do so).
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01 April 2022, 12:28 | #72 |
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01 April 2022, 12:46 | #73 | |
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You wrote "we don't need", when you should have written "I don't need"! You speak for yourself and noone else. You certainly never speak for me! If there ever were to be a single voice for the group, I sincerely doubt that it would be yours! |
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01 April 2022, 12:52 | #74 |
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You didn't answer the question of what i am supposed to be missing.
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01 April 2022, 12:56 | #75 | |
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You are missing the point that your opinion is not a universal fact! You are also clearly missing the ability to admit being wrong! And WOW, DID THAT TAKE SOME EXPLAINING! Big ego or tiny IQ? Both? Last edited by Ffin; 01 April 2022 at 13:43. |
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01 April 2022, 13:45 | #76 | |
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01 April 2022, 14:15 | #77 | |
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For your information, "we" does not necessarily include "you". Furthermore, to admit being wrong i must first see arguments - and you've shown none so far. So please stop that nonsense right now, otherwise your trolling will be signaled to moderation. During all that time it would have been a lot better to just say what's included in your vision of retro gaming that we currently don't have... |
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01 April 2022, 14:38 | #78 |
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01 April 2022, 14:50 | #79 | |
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Sorry, i had to return the gift. Not the smartest move i admit, but little choice.
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I supposed that "retro" means things from the past, i.e. retro gaming was about what we had back then and still enjoy today. Sorry, but that chip is obviously not for anything retro, it is for "modernizing" the platform. |
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01 April 2022, 17:29 | #80 |
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Not to totally OT the thread, but yeah it'd be nice if English had inclusive and exclusive "we" (i.e. shared first and second person plural, exclusive first person plural).
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