FPGA based A500 accelerator

[kipper2k]

Just playing Thinking ahead a bit

[kipper2k]

Can anyone suggest/recommend an intense a500 ocs/ECS demo, that can give idea of performance.. (already have SOTA)

thanks

[robinsonb5]

My go-to performance test when tinkering with the Minimig was the game Zeewolf 2 - it makes good use of Fast RAM when available, and falls over quickly if the RAM or cache is buggy, so it's a good smoke-test too.

[th4t1guy]

The intro sequence for Frontier:Elite 2 is a pretty good benchmark as well.

[Lemaru]

I was using ADoom for stability tests on mine. Just leaving it running on a high screen res (or as high as you can) and leave the demo looping

[Mathesar]

Pressing the nuke button in Lemmings when you have a 100 of them out...

[NovaCoder]

Originally Posted by kipper2k

Can anyone suggest/recommend an intense a500 ocs/ECS demo, that can give idea of performance.. (already have SOTA)

thanks

I'd say ScummVM ECS would have to be the most demanding software that you can run on an OCS/ECS machine


[ Show youtube player ]

[kipper2k]

Morning All,

Thanks for the demo suggestions. Mike is tweaking the glue logic and the results are very good, games and demos we have tried appear to be very fluid and performance is great. Mike will update when the next phase is done. For the A600 i have designed an adapter board that should work regarding the physical fit, we are adding a logic cct to it to allow the onboard CPU to be enabled /disabled.

[Lemaru]

Is the adaptor board also going to be closed source?

[kipper2k]

Originally Posted by Lemaru

Is the adaptor board also going to be closed source?

naw, cant see why. it will be a simple adapter that just acts as a passthrough with something that will switch over. it may need to be reworked for other boards but that would be simple

[Lemaru]

Originally Posted by kipper2k

naw, cant see why. it will be a simple adapter that just acts as a passthrough with something that will switch over. it may need to be reworked for other boards but that would be simple

Sweet! Look forward to seeing more

[kipper2k]

i was referred to this link to solve a600 bus contention, we haven't proved it yet ...

https://retrocomputing.stackexchange...elerators-work

[Lemaru]

Kludge had it working with some boards just by tying BR and VPA to ground on the A600 CPU side and to 5v on the accelerator side. There's more info on it over on the Exxoshost forum.

There's plenty of documentation online regarding 68000 bus arbitration though, and what is required, and the signals involved

[mkstr]

Originally Posted by Lemaru

Kludge had it working with some boards just by tying BR and VPA to ground on the A600 CPU side and to 5v on the accelerator side. There's more info on it over on the Exxoshost forum.

There's plenty of documentation online regarding 68000 bus arbitration though, and what is required, and the signals involved

VPA isn't involved in the bus grant, but they are tied together on the A600 anyway, looks like just because they were too cheap to use another pull-up resistor. The A600 doesn't use VPA/VMA/E because Gayle generates these signals for the CIAs and turns them into normal DTACK bus cycles - I think this is probably because the 020 doesn't have VPA/VMA/E so that logic was needed for the 1200. Incidentally, without this feature it would have be much harder to defeat the on-board 68000 because the E clock output runs even when /BR is asserted, and would conflict with the accelerator's output. As it is these pins can just be ignored altogether (VPA should be pulled up on the accelerator end).

Something to perhaps be aware of is that the 68000 will carry on and complete the current bus cycle after /BR is pulled down (not sure what happens if it is already low when RESET/HALT are released), and it even asserts /BG a tick or two before it actually releases the bus. To avoid a potential conflict at the point of handover I think it would be sensible to have the accelerator held off until a short period of time after the motherboard 68000 has asserted its /BG output, just to be sure the bus has really been released.

Mike

[kipper2k]

Here is design layout (beta) for the A600 CPU converter PCB, It is still missing little logic cct but for the most part it is pretty well complete



it can use the Rom socket as an anchor and also use a screw on the left side of the PLCC socket, should be rock solid

[FREEMILK]

[scu98rkr]

that looks brilliant the converter. It makes a lot of sense, as it would allow the 600 to use all sort of a500 accelerators.

There are alot of alternative cases now too.

[kipper2k]

Originally Posted by scu98rkr

that looks brilliant the converter. It makes a lot of sense, as it would allow the 600 to use all sort of a500 accelerators.

There are alot of alternative cases now too.

Thanks Once the converter board is connected. Your A600 will still work whether or not an external board is attached so no need to remove

[TroyWilkins]

I really like the progress that is being made here, particularly for the much maligned A600. Sadly it looks like if I were to use this design, I'd have to get someone to desolder my ROM and drop in a socket, as my A600 is one of those weird ones with the 37.350 ROM directly soldered to the mainboard.

[kipper2k]

Originally Posted by TroyWilkins

I really like the progress that is being made here, particularly for the much maligned A600. Sadly it looks like if I were to use this design, I'd have to get someone to desolder my ROM and drop in a socket, as my A600 is one of those weird ones with the 37.350 ROM directly soldered to the mainboard.

you wouldnt need to remove your rom, the converter board would actually sit above the rom and not interfere, however you would only be able to secure the converter board using friction of the PLCC socket and the screw which for 99% of people is ok

edit: you would need to ask for one without the pin header for the rom so it doesnt interfere