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Old 10 February 2020, 12:41   #1
mydma
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AGA Compatibility tips?

I had a bit of a nostalgia trip going though some old stuff of mine that I found on janeway.exotica.

I noticed some text on one mentioning "sorry for the lame aga fix" which is not surprising as I never owned a 1200.

So here I am 26 years later wondering what I did wrong!

Googling Ive come up with these two things but what else should I be doing or not doing to ensure AGA compatibility?

This at the start of the copper list:
Code:
dc.w $1fc,0                ;FMODE=0
And this for waiting for blitter:
Code:
	tst DMACONR(a6)    ;I never did this!  Why is is needed?
.wb:
	btst #6,DMACONR(a6)
	bne.s .wb
Other than no self modifying code what other things should I consider for compatibility?
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Old 10 February 2020, 13:33   #2
Antiriad_UK
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Download the "how to code" manual which has a nice section in there on writing for AGA. At the basic level if you are writing for OCS/ECS then you just need to reset some registers that the OS might have flipped into AGA type modes. I do this in my setup copperlist (during system takeover). I don't touch the registers in subsequent copper lists to save dma.
Code:
	fmode,0		;Chip Ram fetch mode (0=OCS)
	bplcon3,$0c00		;AGA compat, dual playfield related
	bplcon4,$0011
For the blitwait, the first tst is for an A1000 bug. I don't do it either (but I tend to set the blit nasty bit before a blitwait which does the same thing anyway I imagine)

Watch out for 020+ caches which break self-modifying code (I've never done it myself - not pro enough ). Watch out for the CPU being insanely fast in fast-ram and finishing simple tasks in a scan line Test in WinUAE with an 040+fastram config and everything inbetween.

Last edited by Antiriad_UK; 10 February 2020 at 13:42.
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Old 10 February 2020, 13:50   #3
mydma
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Thats interesting to know I can just set though registers during set up. I will do that from now on as I am only really interested in targeting ocs/ecs.
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Old 10 February 2020, 13:59   #4
Antiriad_UK
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Doh I forgot the big one. The vbr address may not be at 0 so you can't assume when you are setting you vblanks and such. Do a search for StingRay's startup code/blueberrys code. Mine is at this link but it's tied in with a lot of other gubbins so not ideal https://github.com/jonathanbennett73...troFramework.s

Code:
FW_GetSysDetails:
;VBR check
	move.l	(_ExecBase).w,a6
	moveq	#0,d0			;default VBR at $0
	btst.b	#0,AttnFlags+1(a6)	;68000 CPU?
	beq.s	.yes68k
	lea	.GetVBR(pc),a5		;else fetch vector base address
	jsr	_LVOSupervisor(a6)	;Go Supervisor mode to run a5 and return VBR
.yes68k:
	move.l	d0,FW_Vars+FW_VBRPTR	;d0 is vbr

	rts

	; From call to Supervisor()
	; Get VBR in d0.l
.GetVBR		
	;dc.w $4e7a,$c801		; movec vbr,a4
	dc.w $4e7a,$0801 		; movec vbr,d0
	rte
...
...
...
...
FW_SetBaseLev3Irq:
	move.l	FW_Vars+FW_VBRPTR(pc),a0
	move.l	#FW_IrqHandlerLev3,_Level3Vector(a0)

	rts
Also due to a fastmem/040 scenario you need to write to intreq twice to set int bits safely.
Code:
	move.w	d0,intreq(a6)
	move.w	d0,intreq(a6)		;twice for A4000 compat

Last edited by Antiriad_UK; 10 February 2020 at 14:23.
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Old 10 February 2020, 14:25   #5
mydma
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Oh right. So this that ive been doing is also a no no then

Code:
move.l   $6c,oldLvl3
move.l   #interupt,$6c
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Old 10 February 2020, 14:26   #6
Antiriad_UK
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Quote:
Originally Posted by mydma View Post
oh right. So this that ive been doing is also a no no then

Code:
move.l   $6c,oldlvl3
move.l   #interupt,$6c
boooom
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Old 10 February 2020, 14:33   #7
DanScott
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Not sure if the BPLCON4 is needed? I've only set BPLCON3 and FMODE in mine + the VBR thing that is handled by the startup code

EDIT - Maybe it is worth setting BPLCON4 to ensure the sprite palette selection is correct
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Old 10 February 2020, 14:35   #8
Antiriad_UK
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Quote:
Originally Posted by DanScott View Post
Not sure if the BPLCON4 is needed? I've only set BPLCON3 and FMODE in mine + the VBR thing that is handled by the startup code
Probably not, it's been forever since I've look at the description of an AGA register - I come out in hives
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