Baremetal Amiga Emulator

[bloodline]

Originally Posted by Gorf

Hi!

Did you hear about Michal Schulz' approach to bring AROS to the RasPI (big endian) und his new 68K-JIT?

The new (alpha) JIT is now reaching over 600MIPS on a RasPI3B+ and he was thinking of some kind of baremetal emulation layer himself:
"I need to complete this JIT ASAP and try to integrate it with AROS. Or maybe run the m68k JIT without any operating system directly on RasPi, as a bare metal kernel. What do you think?"

So maybe you both should talk?

https://www.patreon.com/posts/always-remember-24683131

I know Michal quite well from our AROS days! I have been watching his Emu68 project, with an eye to perhaps using it, if I can get my part working suffiently, hence my choice of MPL licence

[Gorf]

[bloodline]

Originally Posted by deimos

What would someone need if they wanted to compile and run this themselves?

On Linux I use clang, I cd into the directory with the source files and then my command line is this:

clang *.c -o omega -Iinclude -Lib -lsdl2 -LSDL2main

you can then run "omega"

On MacOS, create a new “command line” project in xCode, drag and drop the source files in, add in the libSDL2 framework in the project settings... hit run!

On Windows, I have no idea, I never managed to get this to compile.

Simple!

[bloodline]

Managed to get to the boot CLI today!

I don't have keyboard input worked out yet (more fiddling with CIAs...)

Slow progress, but I'm still pretty stoked...

Booting is working quite well now, I found the problem with my floppy loader was that 0s were entering the data stream, which obviously was throwing off AmigaOS.

There are still read write errors but I can get quite far from the startup sequence now... The read/write errors are probably blitter related.

[Samurai_Crow]

Re:word addressable registers
Some games stop the Copper by writing an odd numbered address instead of multiple waits at the end of a custom copper list. This triggers an illegal bus operation and works. Also, on SAGA core on the Vampire, the least significant bit has been remapped to a bank select to double the number of possible registers. I'd rethink your idea of having byte addressable copper lists.

[bloodline]

After a few tries to boot the disk, Omega booted to Workbench 1.3. Notice my Blitter is missing Fill Mode and H-Line mode.

Wow. I'm feeling really happy.

[alpine9000]

Originally Posted by bloodline

After a few tries to boot the disk, Omega booted to Workbench 1.3. Notice my Blitter is missing Fill Mode and H-Line mode.

Wow. I'm feeling really happy.

Congrats!! Quite the achievement!!

[Toni Wilen]

Originally Posted by Samurai_Crow

Re:word addressable registers
Some games stop the Copper by writing an odd numbered address instead of multiple waits at the end of a custom copper list. This triggers an illegal bus operation and works.

What? Bit 0 set in first copper word means WAIT (or SKIP). Bit 0 cleared = MOVE. MOVE to odd register does not exist.

[bloodline]

Originally Posted by Samurai_Crow

Re:word addressable registers
Some games stop the Copper by writing an odd numbered address instead of multiple waits at the end of a custom copper list. This triggers an illegal bus operation and works. Also, on SAGA core on the Vampire, the least significant bit has been remapped to a bank select to double the number of possible registers. I'd rethink your idea of having byte addressable copper lists.

If you look at DMA.c, where the copper instructions are executed, it does read from the word addressed memory. No chance of odd addresses for copper lists. :-)

[bloodline]

A video for those who like that sort of thing

[ Show youtube player ]

[yesplease]

[QUOTE=bloodline;1305817]A video for those who like that sort of thing

Yeah we like that !

[malko]

Originally Posted by bloodline

A video for those who like that sort of thing

So you got it Excellent !!!

[demoniac]

Originally Posted by bloodline

After a few tries to boot the disk, Omega booted to Workbench 1.3.

Great milestone!

[TEG]

[Samurai_Crow]

Originally Posted by Toni Wilen

What? Bit 0 set in first copper word means WAIT (or SKIP). Bit 0 cleared = MOVE. MOVE to odd register does not exist.

I must be getting a bit mixed up from a bit in DMA control or copper control registers mixed in with my incorrect assumptions about how the Copper works. I do know that the Apollo SAGA core has a second bank of control registers for all the chunky modes and the 16-bit audio voices though. That bank of registers is copper addressable by design also.

[Pyromania]

Great job bloodline!

[hooverphonique]

Originally Posted by bloodline

A video for those who like that sort of thing

Great.. Love that floppy action visualization :-)


It looks slower than real hardware (starting WB), or am I just spoiled by only using an A4000 for the last 25 years?

[bloodline]

Thanks guys! I appreciate the support!

Originally Posted by hooverphonique

Great.. Love that floppy action visualization :-)


It looks slower than real hardware (starting WB), or am I just spoiled by only using an A4000 for the last 25 years?

I would say this is running around about the speed a normal A500, The CPU emulation is running in lockstep with the display DMA, which is tied to the the vsync of the laptop (60Hz).

[bloodline]

Originally Posted by hooverphonique

Great.. Love that floppy action visualization :-)


It looks slower than real hardware (starting WB), or am I just spoiled by only using an A4000 for the last 25 years?

I have uploaded a few MFM ADFs to the GitHub, one has SYSInfo on it.

[bloodline]

Running DPaint seems to give a clear reproducible blitter error. My guess is there is a "Last Word Mask" error in the code, someone more knowledgeable about this stuff (Toni?) might recognise what's going on here?

[ Show youtube player ]