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Old 22 September 2008, 17:16   #21
extralife
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Hey Sting, I am patient, just interested thats all m8
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Old 30 December 2008, 15:04   #22
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Just thought I would bumb my own thread to see, if u are still up for this challenge stingray maybe this one fix is a bit more of a challenge than was expected
Anyways hope u haven't giving up happy new years amigasceners
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Old 07 January 2013, 15:34   #23
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Finally I have good news, I have found and fixed the problem with the glenz vector part, it works fine on my 060 now. A bug in the the demo I patched yesterday gave me the much needed clue as to what the problem could be. Hardwired fully working WHDLoad patch should be available in the near future.
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Old 07 January 2013, 16:23   #24
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Out of curiosity what was the problem??
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Old 07 January 2013, 20:33   #25
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Quote:
Originally Posted by StingRay View Post
Finally I have good news, I have found and fixed the problem with the glenz vector part, it works fine on my 060 now. A bug in the the demo I patched yesterday gave me the much needed clue as to what the problem could be. Hardwired fully working WHDLoad patch should be available in the near future.
Raytraced or it didn't happen!
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Old 07 January 2013, 21:15   #26
pmc
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Raytraced or it didn't happen!
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Old 07 January 2013, 22:19   #27
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Out of curiosity what was the problem??
A wrong instruction to enable blitting with the copper (bset works with bytes only when the destination is a memory location and besides reads the memory before the bit is set which is also not exactly what you want when dealing with a write only register). No problem on OCS/68000, it apparently worked by accident on such configs but on AGA/680x0 it didn't.

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Raytraced or it didn't happen!
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Old 08 January 2013, 09:51   #28
Toni Wilen
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Bset and friends are interesting, these kinds of demo bugs also caused problems in emulation.

They work differently for some reason, when it does read-access, write-only custom register see zeros-only write = nothing happens when destination is DMACON/INTENA etc. Normally CPU read-access to write-only register writes whatever CPU's previous fetch was. (and messes up contents of above registers)

I am quite sure it is 68000-only "feature" (possibly 68010 too) and most likely related to bit number calculation which is unique to bset and friends.
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Old 08 January 2013, 17:21   #29
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What's also interesting is that on 68000/OCS COPCON ($dff02e) apparently allows to write to the blitter registers as soon as it's not zero anymore, i.e. it's not necessary to explicitly set bit #1 (CDANG), any will do (Hardwired bug, bset #1,$dff02e). On AGA/680x0 this doesn't work and seems to completely freeze the copper.
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Old 08 January 2013, 17:32   #30
Toni Wilen
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It needs bit #1, I have confirmed it

bset #1,addr works because custom registers always see word access and when writing, original byte is in both low and high byte of word (= $0202).

I think data lines 0-7 and 8-15 having same value when writing byte is another 68000/010 only feature.
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Old 08 January 2013, 17:44   #31
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Thanks, my other guess was that it was because bset reads the memory before setting the bit. In any case, this took me way too much time to find even though it is rather obvious.
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