15 October 2014, 18:43 | #241 |
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Location: Lake Havasu City, AZ
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I changed the instruction scheduling for the c2pbest5 and it should definitely improves it on the 040, it makes it worse on the 030. There are many, many, cases in that code where back to back memory or registers are used. If you interleave memory accesses with register accesses and remove as many back to back register accesses as possible, the pipeline won't be stalled nearly as often.
I have not tested c2pbest_jd code on my 040 yet. I would be curious how well this works on the 060. The c2pbest5 routine is nearly identical to my video driver's C2P for my Mac emulation, which was changed the PCx version when I released PCx, the PC emulation. I attached the code that I put in The Zone and removed the version from there. |
16 October 2014, 16:17 | #242 |
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A1200 Apollo 040/40:
BEST_c2p: 66 21.80 NONE_c2p: 66 14.28 MOVEMOVE: 66 16.38 |
16 October 2014, 18:22 | #243 |
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Thanks dax. I guess I am going to need to get an 060 to play with.
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15 January 2015, 22:52 | #244 |
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Location: Poland
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bestjd
Blizzard 1260 64Mhz:
Results (c2pbestjd) BEST -> 16.38 NONE -> 5.79 MOVE -> 16.37 Results (c2pbest5) BEST -> 16.47 NONE -> 5.71 MOVE -> 16.48 |
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