3.1.4 SetPatch is very slow

[Thomas Richter]

Originally Posted by Cav

0x40000000 - 0x4FFFFFFF CacheInhibit I/O space
(@$40000000, size 256meg, subsize same)

This is the cause of the problem. Apparently the card is drilling a huge 256MB hole into the memory, and this requires a large MMU table and a long time to setup. I am almost certain that it does not require 256MB in one piece, so something's wrong with its autoconfig report.


Nothing I can do from my side. Try to get more information from mntmn, and send greetings to Lukas. If he has more questions, you can redirect them to me.

[Cav]

Originally Posted by Thomas Richter

This is the cause of the problem. Apparently the card is drilling a huge 256MB hole into the memory, and this requires a large MMU table and a long time to setup. I am almost certain that it does not require 256MB in one piece, so something's wrong with its autoconfig report.


Nothing I can do from my side. Try to get more information from mntmn, and send greetings to Lukas. If he has more questions, you can redirect them to me.

Ok thanks! I've forwarded the info to Lukas. Let's hope that it is something he wants and can address.

Br,
Daniel

[Cav]

Originally Posted by Thomas Richter

This is the cause of the problem. Apparently the card is drilling a huge 256MB hole into the memory, and this requires a large MMU table and a long time to setup. I am almost certain that it does not require 256MB in one piece, so something's wrong with its autoconfig report.


Nothing I can do from my side. Try to get more information from mntmn, and send greetings to Lukas. If he has more questions, you can redirect them to me.

The Cybervision 64 3D seem to do the same?
Does that also generate both the long init time and the large memory consumption I wonder. :/

http://www.apehead.se/snakes9000/zz9...showconfig.png

That card has several lines in MMU-Configuration. Would the same cache optimization for ZZ9000 give us a speedup and some fastram back? If that's true, how do we generate it for the ZZ9000 ?


Never mind that.. I found the script that generates it now

[trixster]

Mmu-configuration is generated for your system by navigating to the mmulib/install directory and executing “rx BuildMMUConfig.rexx ENVARC:MMU-Configuration“

I do not know if zorro space used by the zz9000 should be cacheinhibit’d or not - you will need to ask _BNU or MNTMN

[Thomas Richter]

Originally Posted by trixster

Mmu-configuration is generated for your system by navigating to the mmulib/install directory and executing “rx BuildMMUConfig.rexx ENVARC:MMU-Configuration“

This graphics card is probably not yet in my database (aka "rexx script"), but if someone wants to provide the correct line, I would be thankful.


Actually, the default mapping is not at all wrong, it is just "a bit" wasteful. What the proper line(s) would be is something Lukas would be able to answer.

Originally Posted by trixster

I do not know if zorro space used by the zz9000 should be cacheinhibit’d or not - you will need to ask _BNU or MNTMN

Neiter - nor. So the story is the following: "CacheInhibit" is not wrong, though not the optimal choice. If accesses go to graphics card memory, the order in which bytes are written there does not matter, so "imprecise nonserial" is acceptable, but you do not want to cache them, because an on-board blitter may modify the data "under the feet" of the CPU.


However, the board will typically *also* contain hardware registers in some place (just we don't know where), and for those, the order in which you write data into them will matter quite a bit, so they need to be "cache inhibited" (thus, serialized, and precise).



As far as the CyberVision products go: They are standard PCI graphics chips that sit behind a rather generic Zorro-to-PCI bridge. So what you see from the outside is the mapping of the PCI bridge, not the mapping of the chip. Unfortunately, as with all Phase 5 products, there is no documentation which parts of the memory window occupied by the PCI bridge is I/O area and which is graphics card memory, so this was just the result of experiments. If someone knows better, let me know and my "data base script" will be adjusted.

[Cav]

;*************************************************************************
;** MMU Configuration file **
;** **
;** this file is read on startup by the mmu.library and used to modify **
;** the pre-calculated or scanned MMU table **
;** **
;** © 1999-2018 THOR Software, Thomas Richter **
;*************************************************************************



; the current version of the MMU library knows four commands that can
; be used in this file:
; CLEARTTX clears all or parts of the transparent translation registers
; ADDMEM adds memory to the exec free list pool. BE WARNED, this command
; does NOT modify the MMU tables, this must be done manually with
; SETCACHEMODE
; SETCACHEMODE defines the MMU tables.
; DESCRIPTORCACHEINHIBIT defines whether the data cache should be disabled
; for the MMU descriptors. It's usually OFF meaning the cache will remain
; enabled. This is fine for the mmu.library, but certain hacks might require
; an ON argument here. Note that this means more work for the library.


ClearTTx ;ignore all TTX registers if any. We don't need them

;DescriptorCacheInhibit ON ;make access to MMU descriptors cache inhibited


;Board specific setup follows here,
;generated by BuildMMUConfig 1.10 © 29.07.2000 THOR-Software

;General memory setup follows.
;The following lines are a compatibility kludge for some P5 boards
;which enable the MMU prior to the 68040/68060 library and leave
;the memory in CACHEINHIBIT state. You may remove the following
;lines on all other machines most likely.

;Memory setup end.


;Setup for board 28014/4
;For 28014 4 Z3 SetCacheMode {base} Blank IOSpace
;For 28014 4 Z3 SetCacheMode {base} 0x06ffffff Valid IOSpace CacheInhibit
;For 28014 4 Z3 SetCacheMode {base+0x07000000} 0x9000000 Valid IOSpace CacheInhibit NonSerial Imprecise


This is from the BuildMMUConfig.rexx.
Until the lines ";Setup for board 28014/4". The other lines were my desperate attempt at trying to add it.... :$

No, I have no clue of what I'm doing