24 March 2024, 23:24 | #1 |
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Amiga stuck in genlock mode, preventing boot?
I remember once my old A2000 didn't boot at all when connected via RGB port, but worked fine when connected via composite.
Although I'm not 100% sure, I think I was using an RGB-scart cable. However I've read lots of times that this will happen with non-buffered RGB-VGA adapters on big box amiga models. But WHY? Having read up a bit now, this is my understanding so far: To allow a perfect sync of amiga video to external video through a genlock, Amiga computers can run its video timing off the sync of an external video source via pin 1 'external clock' and pin 2 'external clock enable' on the the DB23 video port, plus the Hsync and Vsync signals can be switched from outputs to inputs. So, is the hsync signal just unconnected and floating then, and confusing the detection routine? Is that it? If so, would that not explain why it could happen with an RGB cable as well? (as I think it did for me) They should only use Csync, so Hsync and Vsync are perhaps not connected and floating as well. I'm not at all a hardware designer, so excuse me, but could this be solved simply by pulling up or down the hsync signal? Or would that mess up the sync when used as an output? (Edit: Which is still no problem for RGB-scart) If it would be that simple I don't see a reason for people to keep making RGB-scart adapters, 23-15pin adapters, and motherboard clones with the same issue. (So I guess it's not that simple, haha!) Thank you all for your attention! Last edited by fgh; 24 March 2024 at 23:30. |
25 March 2024, 15:47 | #2 |
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Indeed, SCART doesn't use the HSync or VSync signals, so they shouldn't be affected at all by using an RGB-SCART cable unless it's some sort of non-standard wiring. Leaving the sync signals unconnected won't cause the machine to think there's a genlock attached; if it did, you'd never be able to use the machine using just the composite output.
Also, the circuitry is almost identical between the big-box and wedge Amigas, the chips dealing with the sync signals (Alice / Agnus) are identical and wedge Amigas can certainly detect and use a genlock, so while people always say that unbuffered big-box Amigas are more affected by this issue, I don't understand how. And in my limited experience, the only time I've seen this issue in real life is on an A1200 with an old VGA CRT attached. Adding buffers to the sync lines in that case enabled that monitor to be used. Any VGA display I've tested since has not caused issues when connected unbuffered to a big-box or wedge Amiga. From this, my understanding of the issue is that some older displays place enough of a load on the HSync and VSync signals to drag them down and thus fooling the Amiga into waiting for the signal to rise again to sync. The display and/or cable you used with your A2000 must have presented a similar load to your A2000 to cause this issue. Pulling up the signal won't help here, because putting the sync lines in input mode already means there's most likely a pull-up applied internally. |
26 March 2024, 15:33 | #3 |
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AFAIR AmigaOS activate briefly H and V sync inputs to align internal timing with external one - by forcing H and V sync inputs to one state you may perhaps solve issue but it may be more riskier due load on those lines - isn't better is just buffer those pins?
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26 March 2024, 23:05 | #4 | |||||
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Thanks for your input guys!
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I had a quick look at amigapcb.org and I see v+hsync pins connect to 47 Ohm resistors on the 4000 and 500 vs 68 Ohm on the 1200 and 600, but on the 4000 they also connect to a 74HC4066 (Vsync, U205) and a 74FCT245 (Hsync, U458). Not sure these could explain anything. (Didn't look up 1000/2000/3000 schematics.) Quote:
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I was just curious, as it can be really confusing for people when it happens, and it's not super well known. And as Rob confirms, I'm not sure about the claims of it not being a problem on wedge machines. Perhaps it might even happen on scart connections on some machines or monitors, or with dodgy cables. If someone could explain it precisely, I'd mention it for the OS devs, perhaps they could improve genlock detection somehow to avoid the problem in future kickstart versions. |
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27 March 2024, 10:10 | #5 | ||||
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Issue could be probably solved at the IC design level or by more complex V and H sync I/O pins (like input sampled on one CDAC phase and output placed on other CDAC phase so you could create separate input and output but this was not necessary as genlock functionality albeit very popular in Amiga was relatively low % usage of the overall Amiga models sold). |
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27 March 2024, 16:53 | #6 | ||||
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However a common understanding seems to be that wedge models HAVE signal buffers, and that's why these issues are less common. So if they don't, it's nice to know their agnus/alice might need protection too. Quote:
(I think it's still not possible to use more than one genlock though, IIRC Video Toaster manual says something about that (it's also a genlock)) Quote:
Last edited by fgh; 27 March 2024 at 17:00. |
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27 March 2024, 18:34 | #7 | |||
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Amiga (wedge) are not buffered for sure - IO pins are directly connected with video port so this fragile part - from A500 rev 6 schematics looks like HSYNC is pulled up to Vcc with 4.7k resistors so it is always high, both HSYNC and VSYNC are current limited by 47Ohm resistors. On A3000 and A3000T it is opposite - HSYNC is not pulled up, on A4000 HSYNC is pulled up by 10k resistor also on A4000T it seem to be pulled up by 10k resistor. On A2000 rev 6 HSYNC is pulled up by 10k resistor. Seem only A3000 are affected by missing pulling up resistor on HSYNC line. Quote:
But my point was rather to use internal video slot and also video port so some form of arbitration control over priority could be designed. Yep so best is to used buffered interfaces and consider everything as potential danger for Amiga - there is thread about overclocking precious MC68060 - same for Amiga custom IC's - nowadays they are no longer produced. |
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