Terrible Fire Accelerators

[plasmab]

Originally Posted by whiteb

060 on A500 <insert hysterical laugh> (in a good way).

With Class 10 SD support :P

Really the only reason i'm doing A500 boards is because i found a bunch of them in a skip and if they die i havent lost... once i have learned enough to make a board of worth i'll make A1200,A4000 and CD32 boards... or even standalone motherboards... but i want to crawl first...

[idrougge]

Originally Posted by plasmab

This issue with that is that i would have to have the original 68k in the socket for that. And believe it or not the biggest issue with that is getting long enough turned pin strips *with* turned pin ends. Otherwise it would be reasonably easy.

How about just adding vias next to the 68k pin strips for a socket?

[plasmab]

Originally Posted by idrougge

How about just adding vias next to the 68k pin strips for a socket?

Well that makes the routing harder (because the via's need to be wider and i cant put 2 traces between each pin) and I cant put raised components in the 68K space (like the jtag connector, tantalum caps).... And you'd still need to open the A500 up to change it over anyway... so why make it more complicated than it needs to be... cheaper just to have another A500.

[Pat the Cat]

Originally Posted by idrougge

How about just adding vias next to the 68k pin strips for a socket?

Options, things like changing the design between PLCC and PGA style chips, or changing the memory options, are feasible. Anyone wants to experiment by taking the schematic and rerouting it, feel free. I'll probably end up doing the first one anyway, because really which 030 and which FPU depends on what you've got laying around. The PGA variants usually clock higher. Some PGA runs slower than some PLCC.

The design is just going for a reliable little accelerator with an IDE port, which is a very good match to what the basic A500 lacks, I reckon.

The man knows his memory and what can be had easily. Not necessarily the exact optimum for this kind of configuration, but still plenty good for running software of that era.

You can reroute, but the track resolution (thickness, fineness) of a PCB design is limited to what specification you can get boards made to, and from what materials. You can design it at the nano level, the issue is building it without a space programme.

Let's keep it simple. Simple and working. Exotic variations will spring up anyway, sooner or later.

[whiteb]

Originally Posted by Pat the Cat

You can reroute, but the track resolution (thickness, fineness) of a PCB design is limited to what specification you can get boards made to, and from what materials. You can design it at the nano level, the issue is building it without a space programme.

Let's keep it simple. Simple and working. Exotic variations will spring up anyway, sooner or later.

Well, Look at all the negativity people gave Dennis for Minimig before it released, from saying it couldnt be done, to outright calling him a fake (Those people know who they are), but yet look at the different options now utilizing FPGA, thanks to Dennis doing what he did.

[Pat the Cat]

Originally Posted by whiteb

Well, Look at all the negativity people gave Dennis for Minimig before it released

Was that Open Source or what? It doesn't matter really, THIS is open source, so while comments are fine, what matters is people doing things with it so that real viable solutions emerge.

Criticism is not over harsh when it suggests alternatives, but implementing alternatives isn't the sole responsibility of the github originator. That's open source for you.

You want it, you help make it.

[plasmab]

Originally Posted by Pat the Cat

You can reroute, but the track resolution (thickness, fineness) of a PCB design is limited to what specification you can get boards made to, and from what materials. You can design it at the nano level, the issue is building it without a space programme.

I'm already at 8mil.. You could put it to 5mil but you still cant get 2 tracks between countersunk pins.... With 4 layers you might be able to get it to work but the middle two layers are usually power and ground only.

Anyways... im struggling a little with the IDE. I screwed up a bit with my design for it.

[Pat the Cat]

Well... I've been looking at choices for what kind of 030s and FPUs you can find and mount. There's a surprising variety, but if you want the best, it boils down to 2 different pin arrangements. You've got the best, most common one, but not a good alternative So I think I might rejig the design, and build up some bare boards with the more exotic variaties. I doubt many people will come across them, but it should give a bit more flexibility to what can be built with the design.

Turns out, you got 3 ways to connect. The Motorola PGA ones with C on the end have the nicest manufacturing process, but Motorola didn't invent it. They actually licensed it from Tohoku Semiconductor, who also made 0.8 micron 68030s, with a slightly different PGA. So either of them should do very very nicely. The Tohokus are rarer but do appear occasionally, and have a distinctive black plastic look to them. But they won't fit the given design. So that's a mod I could tinker with.

There's also the other style, that directly connect to a board and are soldered on. They generally don't clock so well, 40MHz is what to expect. They're generally cheaper but not necessarily more available that I could find. I did see some reference to recent manufacture (2014), but couldn't really check what was being made. Mostly without MMU if that route is gone down. I can't tell right now. Similiarly, PLCC. There's bits and pieces but nothing really "this is available from X and it's this kind of 030".

[plasmab]

Originally Posted by Pat the Cat

Well... I've been looking at choices for what kind of 030s and FPUs you can find and mount. There's a surprising variety, but if you want the best, it boils down to 2 different pin arrangements. So I think I might rejig the design, and build up some bare boards with the more exotic variaties. I doubt many people will come across them, but it does give a bit more flexibility to what can be built with the design.

Turns out, you got 3 ways to connect. The Motorola PGA ones with C on the end have the nicest manufacturing process, but Motorola didn't invent it. They actually licensed it from Tohoku Semiconductor, who also made 0.8 micron 68030s, with a slightly different PGA. So either of them should do very very nicely. The Tohokus are rarer but do appear occasionally, and have a distinctive black plastic look to them. But they won't fit the given design. So that's a mod I could tinker with.

There's also the other style, that directly connect to a board and are soldered on. They generally don't clock so well, 40MHz is what to expect. They're generally cheaper but not necessarily more available that I could find. I did see some reference to recent manufacture (2014), but couldn't really check what was being made. Mostly without MMU if that route is gone down. I can't tell right now. Similiarly, PLCC. There's bits and pieces but nothing really "this is available from X and it's this kind of 030".

Wouldnt it be simpler just to put a plcc socket in the board for the PGA? Routing that 030 took a solid week and almost didnt pay off. If i'd had one more track to route i'd have had to ripup and do again.

[Pat the Cat]

Depends. Ideally you want to solder PLCC style components. Iffy. It should work OK, but it probably won't clock as good. Not if you've oxidation of contacts on the socket. That isn't an issue with connecting PGA chips, it can be an issue connecting PGA with 132 PLCC. One side is gold plated and the other one isn't.

If everything's clean and fine, should work though.

Originally Posted by plasmab

I'm already at 8mil.. You could put it to 5mil but you still cant get 2 tracks between countersunk pins.... With 4 layers you might be able to get it to work but the middle two layers are usually power and ground only.

.

It all boils down to what you make the board tracks from, and how fine they can be made, at the manufacturing stage. Getting them thinner isn't the issue, it's making sure they are conductive enough to be reliable, can take the signals without causing problems doing that. It's not straightforward but there are ways to do it.

So long as the schematic is good, the logic is good, the hardware works, then rerouting the design isn't TOO much of a bother. It's fiddly, but I find it kind of therapeutic.

[plasmab]

Originally Posted by Pat the Cat

Depends. Ideally you want to solder PLCC style components. Iffy. It should work OK, but it probably won't clock as good. Not if you've oxidation of contacts on the socket. That isn't an issue with connecting PGA chips, it can be an issue connecting PGA with 132 PLCC. One side is gold plated and the other one isn't.

If everything's clean and fine, should work though.

At sub 100Mhz speeds there isnt an issue. You can always gold plate the socket if you feel like making sure....

It all boils down to what you make the board tracks from, and how fine they can be made, at the manufacturing stage. Getting them thinner isn't the issue, it's making sure they are conductive enough to be reliable, can take the signals without causing problems doing that. It's not straightforward but there are ways to do it.

So long as the schematic is good, the logic is good, the hardware works, then rerouting the design isn't TOO much of a bother. It's fiddly, but I find it kind of therapeutic.

Actually this is rubbish... thinner is the issue because the manufacturing yields rates drops off dramatically after 5mil. Etch times become critical and more copper weight doesnt help much because you have undercut. The thinner the track the worse the undercut gets. I have done a lot of PCB etching.



Most of the board houses wont touch < 6mil and the price starts to go up after that because the yields drop. Even DirtyPCBs say 10 pieces +/- what screws up in their protopack.

[Samurai_Crow]

How would the routing be for a 100 MHz Altera FPGA? I am pretty sure that Gunnar von Boehn will gladly make a softcore for it. If it does not clock so high at first, the core will adjust at 7 MHz intervals. :-)

[plasmab]

Originally Posted by Samurai_Crow

How would the routing be for a 100 MHz Altera FPGA? I am pretty sure that Gunnar von Boehn will gladly make a softcore for it. If it does not clock so high at first, the core will adjust at 7 MHz intervals. :-)

As i have repeatedly stated I wont work with non-Open Source. If they publish the Apollo Core i'll think about it. Otherwise i'm putting in effort that cant be repeated by someone who just wants to pick up where i left/leave off.

[Pat the Cat]

Originally Posted by plasmab

...copper

Yes, I did say the materials used and process of manufacture affected things, didn't I. Taps nose.

Maybe an extra 20p on the total board cost per unit, mind you. Whoopee doo dah, it's worth it for reliable connections.

[plasmab]

Originally Posted by Pat the Cat

Yes, I did say the materials used and process of manufacture affected things, didn't I. Taps nose.

Maybe an extra 20p on the total board cost per unit, mind you. Whoopee doo dah, it's worth it for reliable connections.

I've never seen a PCB manufacturer do anything but copper for tracks.. they do all sorts of different weights of copper at different prices. I've seen (and worked with) Aluminium substrate boards but they've always been copper for the tracks... and different weights of copper make more than 20p per board difference (at 10cm x 10cm).

Happy to be wrong... Just never seen it in 20 years of doing this.

EDIT: I'm also pretty sure copper has the best undercut performance too.

[Locutus]

I guess Pat has been Wikipedia'ing furiously.

[Samurai_Crow]

Originally Posted by plasmab

As i have repeatedly stated I wont work with non-Open Source. If they publish the Apollo Core i'll think about it. Otherwise i'm putting in effort that cant be repeated by someone who just wants to pick up where i left/leave off.

D'oh! With Kipper on diminished capacity with his hand surgery and Majsta tied up with manufacturing it would have been a good time to join the team. I guess it will take time to get the ASIC in production so it will be on the same footing as a 68040.

[plasmab]

Originally Posted by Samurai_Crow

D'oh! With Kipper on diminished capacity with his hand surgery and Majsta tied up with manufacturing it would have been a good time to join the team. I guess it will take time to get the ASIC in production so it will be on the same footing as a 68040.

Indeed.

This is nothing personal about them choosing to keep it close source. I think that that is wise actually. But the point of my project is to crack the lid open and make this stuff easy for people to reproduce. If i use things that cant be obtained (or replaced) readily then it defeats the purpose.

It all started when I looked at my Blizzard 060 card and reflected on how much i had paid for it.

[jediknight]

plasmab hows the board actually going what speed is it running at now , unlike many people i like this accelerator because its using real hardware and cant wait to try and make one .

[plasmab]

Originally Posted by jediknight

plasmab hows the board actually going what speed is it running at now , unlike many people i like this accelerator because its using real hardware and cant wait to try and make one .

The CPU and RAM work perfectly at 25Mhz. Thats as fast as my signal generator goes. I will use one of my fpga boards to clock double and see how fast i can get it going..

This weekend I have been focussing on the Gayle emulation. Its not going brilliantly to be honest. I have had to work around a few mistakes in the board. Nothing major but a Rev 2 will be required with some tweeks.