maybe classic Amiga at 402.5 Mhz with CPU Cyclone II FPGA 20K PQFP-240?

with this cpu a good electronic engineer can try to create the pcb.


the cpu is 100% compatible with 68000


http://parts.arrow.com/item/detail/altera/ep2c20q240c8n

http://www.datasheetarchive.com/EP2C...datasheet.html



the only problem is the voltage converter from the accelerator to the Amiga pcb, 1.5 V to 3.3V or 5v, a lot complicated


or can use a http://www.cast-inc.com/ip-cores/pro...t_c68000-a.pdf

c 68000 with cpu Stratix-V EP5GXEA32-2 at 149 Mhz


http://www.cast-inc.com/ip-cores/pro...8000-ahb-a.pdf

Stratix II EP2S15F484C3 at 402 Mhz

[majsta]

You contacted me via email few times and said all of those things. It seems to me that you have no idea what you are talking about.

[Loedown]

Level shifting is a pain in the neck, not only do you have to take into effect so many I/O but also the latency between individual level shifters, with timing so critical in microprocessor circuitry it doesn't become a viable option.

[alexh]

That CAST IP is not free.

The second CAST IP rated at 402MHz bus speed is not useful for Amiga.

[majsta]

He somehow think that FPGA is compatible with MC68K without any core ???

@Loedown i published paper about level shifting on my site where everything is explained. Final conclusion that amiga chipset is so adaptable and anything can be used.

@alexh is something is able to run at that speed than is adaptable to any amiga but main question is regarding performance so many people think that if we run something at higher freq we get better performance every time. With cores integrated into FPGA sometimes that is not the case.

[alexh]

Originally Posted by majsta

He somehow think that FPGA is compatible with MC68K without any core ???

I don't think so. Ematech is suggesting using the CAST C68k core. Some commercial IP.

Originally Posted by majsta

@alexh is something is able to run at that speed than is adaptable to any amiga

The core rated at 402MHz only has a 92MHz 68k core speed. May as well use the more suitable of the two versions which is rated to 142MHz in the same FPGA.

Originally Posted by majsta

so many people think that if we run something at higher freq we get better performance every time. With cores integrated into FPGA sometimes that is not the case.

I'm sure it's not just cores integrated into FPGA's??

CPU architecture has always played a greater role than clock speed. Implement a better architecture (using pipelines, caches and branch prediction etc.) and you will be much faster clock for clock than one without.

[Loedown]

Originally Posted by majsta

He somehow think that FPGA is compatible with MC68K without any core ???

@Loedown i published paper about level shifting on my site where everything is explained. Final conclusion that amiga chipset is so adaptable and anything can be used.

@alexh is something is able to run at that speed than is adaptable to any amiga but main question is regarding performance so many people think that if we run something at higher freq we get better performance every time. With cores integrated into FPGA sometimes that is not the case.

I was more commenting on the level shifter issue from 1.5 V to 5 V, unless you mean that standard CMOS level of 0.8V to register as a logical level 1?

Do you just use resistors to go the other way ( voltage divider )

To be honest I was just throwing in my two cents worth, I know very little about FPGA, never had a need to know much about them.

[pandy71]

Originally Posted by Loedown

Level shifting is a pain in the neck, not only do you have to take into effect so many I/O but also the latency between individual level shifters, with timing so critical in microprocessor circuitry it doesn't become a viable option.

Why?

Use serial bus between FPGA and CPU frontend - for example something like 74xx194 or better 74xx299 - MC68000 is slow on Amiga and i see no sense to provide FPGA high speed directly.

[Loedown]

Originally Posted by pandy71

Why?

Use serial bus between FPGA and CPU frontend - for example something like 74ls194 - MC68000 is slow on Amiga and i see no sense to provide FPGA high speed directly.

4 bits per chip x 4 chips for full 16 bit data bus, if one of those chips has slightly worse latency than the rest then you may have an incorrect bit value on the output before the next clock cycle, taking that solely without looking at that particular device's latency. 7MHz won't be an issue but if FPGA is running at some ridiculous speed then these things must be considered.

[pandy71]

Originally Posted by Loedown

4 bits per chip x 4 chips for full 16 bit data bus, if one of those chips has slightly worse latency than the rest then you may have an incorrect bit value on the output before the next clock cycle, taking that solely without looking at that particular device's latency. 7MHz won't be an issue but if FPGA is running at some ridiculous speed then these things must be considered.

Latency in typical HCT is less than 10ns - this should be not a problem for 7MHz clock... and there is many ways to make it faster.

Issue is that i will be perfect to have some 5V CPLD that will act as CPU frontend and FPGA connected trough serial interface to reduce amount of level translated lines - sadly i must say that 5V CPLD's are bit to expensive. So this is why i think that even some amount of TTL's can be useful.

[Loedown]

Originally Posted by pandy71

Latency in typical HCT is less than 10ns - this should be not a problem for 7MHz clock... and there is many ways to make it faster.

Issue is that i will be perfect to have some 5V CPLD that will act as CPU frontend and FPGA connected trough serial interface to reduce amount of level translated lines - sadly i must say that 5V CPLD's are bit to expensive. So this is why i think that even some amount of TTL's can be useful.

Just to reiterate, I have very little knowledge of FPGA, just playing devil's advocate on possible problems that may arise due to latency and timing.

[Promilus]

Use serial bus between FPGA and CPU frontend - for example something like 74xx194 or better 74xx299 - MC68000 is slow on Amiga and i see no sense to provide FPGA high speed directly.

FPGA I/O speed is almost irrelevant here as the CPU softcore must still wait for acknowledge by peripherials so... it just doesn't matter much - that's the basics of async. communication. that's why even overclocked 060 to 100-120MHz (no FPU) can still work with Amiga clocked on stock some 6-8 times less.
Now about C68000. One - it's commercial so no royalty free. Two - it uses more LEs than TG68k + cache + SDRAM mem controller (so... more expensive FPGAs) . Three - it doesn't bring much performance gains over real 68k but has 32bit wide address space just as tg68. Those 149MHz on Stratix V just isn't really impressive and since in most cases it doesn't go past 100MHz with basic instruction set I doubt there's even real competition to 68040

sadly i must say that 5V CPLD's are bit to expensive

All you need is fast 5V tolerant ones, I believe they reduce latency to 5ns and can be used for "buffering".

[Stedy]

Hi,

the only problem is the voltage converter from the accelerator to the Amiga pcb, 1.5 V to 5v, a lot complicated

Dead easy, use the TI CBT family, http://www.ti.com/product/sn74cbt16245 or http://www.ti.com/product/sn74cbt3384a
The FPGA has 3.3V LVTTL I/O and the Amiga has 5V logic. Propagation delay of 0.35ns, have flight qualified this family of parts.

As others have stated, never get taken in by the headline figures of an FPGA.

[majsta]

@Promilus I must say that I agree. I also think that there is no much performance increase on that clock. Core itself does not have cache inside so enough said.

I will say one more time like I said to him answering those mails he sent to me. For now it is not important what FPGA type you use because there is no MC68K core that can accomplish more than real 30MHz about MC68030 - 040 performance at best case using complex caches. But, it won't take long that I will prove myself wrong.

ok I have no idea what I'm talking about., but Majsta when you have sell the full stock of Vampire 600 you can try the CAST C68k core, before Individual computers try a solution and create another accelerators before you......

[majsta]

It is not important for me that someone will continue to develop faster or better version as long as I proved my concept that FPGA is correct direction for creating accelerators for retro computers. Complete idea was to force serious players to think twice about their ideas of future accelerators development. But some of them will never admit that they were wrong so they will never enter in creating something like this. In other words everyone will start talking that serious players just copied my design.

I see nothing special in C68K core and I will be using something much better in the future. I understand your desire to propose new ideas but for all of as who spend most of the day investigating what could be done this is not new idea. I could only suggest you to watch closely what will happened in month or two regarding FPGA acceleration.

[alexh]

Originally Posted by ematech

Majsta you can try the CAST C68k core

You buy it for him. Get him the files and maybe he will.

[robinsonb5]

Originally Posted by ematech

ok I have no idea what I'm talking about., but Majsta when you have sell the full stock of Vampire 600 you can try the CAST C68k core, before Individual computers try a solution and create another accelerators before you......

Unfortunately I doubt the CAST core, SDRAM controller and Glue logic would successfully fit in the Vampire's FPGA. Using just the CPU would be pointless with no Fast RAM.

[majsta]

Ok today, I have revived price for mentioned c68000 and it is 50 000USD for single project license. So any type of discussion about implementing C68000 to any type of Amiga accelerator stops here.

[pandy71]

there is many 68k cores

http://www.hitechglobal.com/ipcores/D68000.htm
http://www.dcd.pl/ipcore/101/d68000/
http://www.design-reuse.com/sip/32bi...ible-ip-29935/

And probably many more, also TG68 probably can be improved and made faster (barrelshifter for bit shifting, shorten clock cycles, pipeline, cache on board etc)

Limitations is cheap FPGA and cheap HDL tools...