m68k-amigaos-ld.exe bug ?

[FrenchShark]

Hello,

I am trying to use AmiDevCpp to generate a boot ROM.
I am using vasmm68k for the assembly part and GCC for the C part.
I have a custom makefile and .ld file.

If I tell the linker to generate a binary for srec file, I have an ACCESS_VIOLATION.
If I generate an a.out file and use m68k-amigaos-objcopy.exe to create a binary, I have an empty binary file.

Makefile:

 
# Project: pff
# Compiler: m68k-Amiga-OS3
# Compiler Type: MingW 3
# Makefile created by wxDev-C++ 6.10.2 on 26/11/09 13:13
CPP       = m68k-amigaos-g++.exe
CC        = m68k-amigaos-gcc.exe
WINDRES   = windres.exe
OBJ       = main.o pff.o
LINKOBJ   = crt0.o main.o pff.o math.o access.o diskio.o sd.o
LIBS      = -T bootstrap.ld -Map bootstrap.map
INCS      = -I"D:/Perso/AmiDevCpp/usr/local/amiga/m68k-amigaos/sys-include"
CXXINCS   = -I"D:/Perso/AmiDevCpp/usr/local/amiga/m68k-amigaos/sys-include"
RCINCS    =
AOUT      = bootrom.aout
BIN       = bootrom.bin
DEFINES   =
CXXFLAGS  = $(CXXINCS) $(DEFINES) -save-temps -fexpensive-optimizations -O3 -m68000 -nostdlib -noixemul
CFLAGS    = $(INCS) $(DEFINES) -save-temps -fexpensive-optimizations -O3 -m68000 -nostdlib -noixemul
GPROF     = gprof.exe
RM        = rm -f
LINK      = m68k-amigaos-ld.exe
OBJCOPY   = m68k-amigaos-objcopy.exe
.PHONY: all all-before all-after clean clean-custom
all: all-before $(BIN) all-after
clean: clean-custom
 $(RM) $(OBJ) $(BIN) $(AOUT)
$(BIN): $(AOUT)
 $(OBJCOPY) -O binary $(AOUT) $(BIN)
$(AOUT): $(OBJ)
 $(LINK) $(LIBS)
main.o: $(GLOBALDEPS) main.c
 $(CC) -c main.c -o main.o $(CFLAGS)
pff.o: $(GLOBALDEPS) pff.c
 $(CC) -c pff.c -o pff.o $(CFLAGS)

.ld file:

 
TARGET(a.out-amiga)
INPUT(crt0.o main.o pff.o math.o access.o diskio.o sd.o)
OUTPUT(bootrom.aout)
MEMORY {
        bootram (RWX) : ORIGIN = 0x00000000, LENGTH = 0x00002000
        sdram   (RWX) : ORIGIN = 0x00002000, LENGTH = 0x00FFE000
}
SECTIONS {
        .text : {
                _stext = . ;
                crt0.o (.text)
                *(.text)
                _etext = . ;
        } > bootram
        .data : {
                _sdata = . ;
                *(.data)
                _edata = . ;
        } > sdram
        .bss : {
                _sbss = . ;
                *(.bss)
                *(COMMON)
                _ebss = . ;
        } > sdram
}

I am running out of ideas.

The only short term solution I see is to write everything in assembly.

[FrenchShark]

I have found the solution :
vasm does not generate ".text" and ".data" sections but "code" and "data".
I found the problem by using the excellent vlink from Frank Wille.
His tool gives you more information than GNU ld in verbose mode
Now I am even thinking about dropping GCC and using VBCC.

Now, I have my boot ROM, it is time to run some 68000 code on the FPGA.

Cheers,

Frederic

[phx]

Originally Posted by FrenchShark

I have found the solution :
vasm does not generate ".text" and ".data" sections but "code" and "data".

Just use the SECTION directive and give your sections the name you prefer. For example:

        section ".text",code