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Old 22 December 2009, 19:47   #61
yaqube
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Quote:
Originally Posted by Toni Wilen View Post
I thought Denise hpos range (standard PAL) is 0 to 227.5 * 2 = 455.
For the short line (227 CCKs) it should be from 0 to 226*2+1 (= 453) but as it's advanced by 2 it is in range from 2 to 455.

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Unfortunately it is practically impossible to confirm without knowing internals of the chip
I tested this indirectly by changing sprite trigger position (the sprite trigerred on any hpos value between 2 and 455). The same test may be conducted on ECS Denise horizontal display window: if diwstop <= 455 (and >= 2) and diwstrt < 2 the display is blanked. Alternatively if diwstart is in 2 to 455 range and diwstop out of this range the display is never blanked horizontally.

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Confirmed, A1200 returns 0x00F8, ECS Denise 0xFFFC (was 0x00FC in UAE)
A4000 returns 0xFCF8. Actually A1200 misses the second shift register and the high byte is always 0.
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Old 22 December 2009, 20:30   #62
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Yeah, I noticed this when I applied my maximum overscan mentioned in the overscan thread on my A600

According to HRM, 00 and ff should be valid DIWSTRT and DIWSTOP - it would be interesting to know if there's a HRM updated for ECS that mentions why ECS has this "limitation". 00 and ff works fine on OCS, which is what the HRM is written for, I guess. Until I see / hear otherwise

Maybe this nice thread will end up as a HRM addendum
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Old 22 December 2009, 20:36   #63
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Originally Posted by Photon View Post
Yeah, I noticed this when I applied my maximum overscan mentioned in the overscan thread on my A600

According to HRM, 00 and ff should be valid DIWSTRT and DIWSTOP - it would be interesting to know if there's a HRM updated for ECS that mentions why ECS has this "limitation". 00 and ff works fine on OCS, which is what the HRM is written for, I guess. Until I see / hear otherwise

Maybe this nice thread will end up as a HRM addendum
Third edition includes "appendix C Enhanced Chip Set". Nothing about changed DIW limits. (except related DIWHIGH change)

I guess I need to put OCS Denise back and do some tests
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Old 23 December 2009, 00:45   #64
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IIRC I had to go up pretty far ($28 or so??) to make DIWSTRT work? Could be mistaken.
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Old 24 December 2009, 14:01   #65
Toni Wilen
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I finally did some tests with OCS Denise and as usual I was wrong..

horizontal diwstart 0-1 does not normally work (just like ECS Denise) but it seems horizontal diw does open if vpos is between 0 and 8 (inclusive)

Unfortunately logic analyzer is not connected to OCS Denise Amiga so I can't really be sure which lines have special behavior. (and why?)

More tests to do..

[few more tests done]

It looks like at least one line (8? 9?) counts to 445 (not 455) because changing diwstop hpos from 0xBE to 0xBD during this line (and then in next line to 0xC8 or larger) causes display to blank.

455 - 445 = 10 / 2 = 5. Hmm..

[and some more test]

I created copper list that moves hdiwstart so that it never matches (wait for 1/3 of scanline, hstart=2, wait for 2/3 of scanline, hstart=middle of scanline and so on..)

Test 1: line 1: make sure hdiw is open by setting hstrt to some normal value, hstop=0xff, wait 1-7 lines, run above copperlist: no display

Test 2: same but wait to line 9 (or more): hidw open, visible display

There is something weird happenin on line 8 (or all lines 0 to 8)

[4th]

Same tests with ECS Denise and no more weirdness, hdiw won't mysteriously close during early raster lines.

Last edited by Toni Wilen; 25 December 2009 at 13:30.
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Old 26 December 2009, 20:56   #66
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I have made some tests with an OCS Denise and a logic analyzer. I was wrong thinking that the OCS display window generation is considerably different than the ECS.

I can confirm all Toni's observations. During normal display hdiwstrt < 2 doesn't enable the display window. Also hdiwstop > 455 ($1C7) doesn't disable it. Exactly the same way acts an ECS Denise.

As Tony has noticed something interesting happens during display lines 0-8. The display window is enabled there. And I think I have found an explanation.

During first 9 display lines (0 - 8) register $038 (STREQU) is written (the write takes place during first refresh slot). That's a time when serration and equalization pulses are generated for CSYNC. Then during lines 9 - 25 (PAL) register $03A (STRVBL) is written.

It seems that writing $038 register doesn't reset (exactly doesn't set to 2) the hpos counter inside Denise. This counter is probably 9-bit wide and rolls over a few times during this period. That's why start condition of hdiwstart < 2 is satisfied. Also any hdiwstop is satisfied but at the end of the 9th line the hpos counter counts only to (455 + 9*454) % 512 = 445 so if hdiwstop > 445 the display is enabled.

If you wonder what the above numbers mean here is a brief explanation:
455 - last hpos value during the last display line
9 - number of lines when $038 strobe register is written
454 - line length (227 CCKs)


In ECS Denise this design omission has been fixed and that's why hdiwstrt < 2 doesn't enable the display window.

Last edited by yaqube; 27 December 2009 at 09:31.
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Old 26 December 2009, 21:36   #67
Toni Wilen
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Originally Posted by yaqube View Post
(455 + 9*454) % 512 = 445
Thanks. This explains it perfectly and is simple and logical

(I should have noticed this but I never checked what was the difference in strobes between lines 0 to 8 and 9+)
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Old 27 December 2009, 14:45   #68
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Quick NTSC mode tests. Last "non-working" line is 9. Line 9 max hdiw is 397. 398 = flickers (long/short line), 400 is first non-flickering frame.

I think I am missing something because I can't find how it is supposed to be 400.. perhaps in NTSC first line(s) have different strobes than in PAL mode? (2 lines would look more or less perfect)
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Old 27 December 2009, 15:37   #69
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Indeed in the NTSC mode the first 10 lines are strobed by $038 register.
So if the last line of the previous frame was a short line (227 CCKs) then the hpos counter at the end of the 10th line is equal to:

(455 + 5*454 + 5*456) % 512 = 397

455 - last hpos value at the end of the previous frame (assuming a short line)
5 - number of short and long lines during the first 10 display lines
454 - length of a short line (227 CCKs)
456 - length of a long line (228 CCKs)


If the previous frame ends with long line (228 CCKs) then this value is 399.
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Old 09 February 2010, 10:51   #70
Toni Wilen
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OCS sprites outside of bitplane area is possible (officially supported on/off bit only in AGA): write to BPL1DAT once somewhere in the beginning of scanline and sprites appear normally until end of scanline. (I don't remember if BPLCON0 needs at least one enabled bitplane but at least this works outside of DDFSTRT-DDFSTOP range)

Can be combined with normal bitplanes (and can cause some display "alignment" issues) Useful if you want to save DMA cycles but for example still want to have something visible in left or right border.
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Old 09 February 2010, 10:57   #71
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A1000 DIP Agnus (also in first A2000 revision) has undocumented "bug", display field's first or last (depending on your viewpoint) strobe isn't vblank probe which causes vblank interrupt to trigger one line later than in any other Amiga model. (yaqube found this one)

Everything else (including DFF004/DFF006) works normally, only vblank interrupt gets delayed.

Not common technical info: Paula sets the interrupt when it sees first vblank strobe in RGA bus, not Agnus. Only "real" Agnus interrupt is blitter finished and that uses separate pin that connects to Paula.
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Old 09 February 2010, 11:03   #72
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Last paragraph: still only regarding A1000?

BPL1DAT trick: fails on ECS/AGA?
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Old 09 February 2010, 15:52   #73
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Quote:
Originally Posted by Photon View Post
Last paragraph: still only regarding A1000?
No, all Amigas, even AGA use same inter-chip communication. (in theory you could replace Lisa with Denise and display would still work as long all display modes and color depths are ECS compatible)

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BPL1DAT trick: fails on ECS/AGA?
It should work (at least it works on ECS), see also above reply
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Old 14 May 2010, 01:15   #74
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Roll eyes (sarcastic)

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Originally Posted by Toni Wilen View Post
OCS sprites outside of bitplane area is possible (officially supported on/off bit only in AGA)
Wow. That's really interesting.
Have you ever stumbled on any pre-1990 game that actually does make use of this?
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Old 14 May 2010, 09:29   #75
Toni Wilen
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Wow. That's really interesting.
Have you ever stumbled on any pre-1990 game that actually does make use of this?
No. Only known program so far is demo Sequential by Andromeda. ("magnet" and "18 frames!" parts) But there has to be others..
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Old 14 May 2010, 18:08   #76
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There ought to be some. To say the least, I'm almost a bit shocked!!
Well, this could've opened lots of new ways in coding for game programmers even in A500 times at the end of the 1980s, and there was nobody of them who would've bothered using it! From a "quick 'n dirty" point of view: quite a loss!
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Old 15 May 2010, 11:55   #77
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BPLCON4 (AGA-only) sprite and bitplane color changes are delayed by 1 lores pixel compared to direct color register color changes.

Roots 2.0 / Sanity "flower zoomer" part has gaps if this is not correctly handled.
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Old 20 May 2010, 10:31   #78
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If you like strange things i suggest you get 020 or 030 (real hardware) and try to predict what's in the CCR's N bit after a CMP2 instruction. Good luck :-)
Btw. Mot' manuals say "undefined", of course.
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Old 20 May 2010, 10:33   #79
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If you like strange things i suggest you get 020 or 030 (real hardware) and try to predict what's in the CCR's N bit after a CMP2 instruction. Good luck :-)
Btw. Mot' manuals say "undefined", of course.
CPU (non-68000) is not as interesting as chipset
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Old 20 May 2010, 14:52   #80
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CPU (non-68000) is not as interesting as chipset
Why ?
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