Call vs JSR

[idrougge]

Originally Posted by The manual

Call Address
Call make program flow to be transferred to the memory location specified by Address.
NOTE that Call is for advanced programmers only, as incorrect use of Call can lead to severe problems - GURUS etc!
A 68000 JSR instruction is used to transfer program flow, so an RTS may be used to transfer back to the Blitz program.

Is there any actual difference between the Call command and just an inline JSR?

[Daedalus]

Hmmm, it doesn't sound like it. I've only ever used JSR so I can't be sure, but it just sounds like a "BASIC-ified" wrapper for JSR.

[Daedalus]

I can't make sense of the token numbers in the Blitz source, so I'll have a look tonight when I'm in front of my Amiga. But it looks like it just does some stack shuffling and then calls the JSR:

JL_0_25C:
CNIF #return0=1
  ADDQ.l #4,a7
  JSR -$8a(a6)
  MOVEM.l (A7)+,A0-A1/A6
  RTS
CELSE
  MOVE.l #AL_0_268,D0
 TRAP #$0
CEND

But as I say, I don't know whether that's the correct token or not...

[Anakirob]

I can't say what the differences are between many Blitz functions and their 68K ASM equivalents.

Personally I made a habit of using 68K instructions instead of Blitz functions whenever I could, under the assumption that using them might somehow make my code that little bit more efficient, for example I would use:

JSR instead of GoSub or GoTo
RTS instead of Return
LSL instead of *2, *4, *8, etc.
LSR instead of /2, /4, /8, etc.
and sometimes BEQ or BNE with the appropriate value instead of JoyB and other condition checks.

But I honestly don't know if there is any actual improvement/optimisation of final binary going on when using these instead of Blitz functions (although I suspect that LSL/LSR are quite a bit faster than standard math routines). If someone could shed some light on the issue that would be handy.

[idrougge]

Even the AMOS compiler translates multiplications in powers of two into shifts. I can't imagine Blitz being any worse.

[idrougge]

So does this mean that A0, A1 and A6 are saved on the stack using CALL?

[Lonewolf10]

Why not try a simple test to find out?

[idrougge]

I don't have the necessary mastery of the debugger.

[Daedalus]

Well, bear in mind that I'm still not sure that's the actual Call token code... But it actually looks like it's pulling those registers back off the stack after returning from the JSR. Not sure at which point they're pushed onto the stack, so I think there's more to it. Thinking about it, if Call just jumps the PC to another address, why would it need any stack shuffling at all?

[idrougge]

It would make more sense if it actually saved those registers which are vital to Blitz instead of some random address registers.

[Daedalus]

Yep, which is why I have my doubts about it now. Hmmmm, more investigation is needed...

[Lonewolf10]

In standard ASM, a6 is used for the user/custom stack pointer and a7 (or PC) is used as the program counter.

Of course, this is Blitz and may not be following normal ASM conventions...

[Daedalus]

Yeah, Blitz uses A7 as the stack pointer according to the documents. PC is its own separate register, A6 can be used for whatever you want it seems.

[idrougge]

Originally Posted by Lonewolf10

In standard ASM, a6 is used for the user/custom stack pointer and a7 (or PC) is used as the program counter.

Of course, this is Blitz and may not be following normal ASM conventions...

A7 is stack pointer and PC is PC, you mean.

[BippyM]

I thought this too!

Originally Posted by idrougge

A7 is stack pointer and PC is PC, you mean.

[Lonewolf10]

Originally Posted by idrougge

A7 is stack pointer and PC is PC, you mean.

No.

It's been over a year since I coded in ASM so when you questioned what I wrote I wondered if I was getting things mixed up.
Here is a quote from a Wiki page (https://en.wikibooks.org/wiki/68000_Assembly):

There are seven address registers: a0, a1, a2, a3, a4, a5, and a6. These are typically used as pointers.

There is one active stack pointer: SP, also called a7. Normally the processor is in user mode. In user mode, SP refers to the User Stack Pointer (USP) register. (During interrupts, the active stack pointer SP is another register called the Interrupt Stack Pointer or the System Stack Pointer. The 68020 and higher processors have a third register called the Master Stack Pointer. Neither the ISP nor the MSP can be accessed in user mode).

Register a7 is a special register and I usually don't touch it when coding in ASM.

I note that I quoted a Wiki and it may be wrong, but I am pretty sure that the above information is correct.

Edit: After re-reading what I originally wrote and what I just posted, I realise I meant SP instead of PC

[idrougge]

A6 is usually used for library bases as far as I know.

[Lonewolf10]

Originally Posted by idrougge

A6 is usually used for library bases as far as I know.

Yes, that is what the official documentation recommends. However, it is up to the programmer if they wish to follow it and if they decide to take full control of the machine (e.g. for demo's or games) and pause the background processes (e.g. workbench) then a6 can be used for anything.