Terrible Fire Accelerators

[plasmab]

A burst data pipe!! now I really am annoyed I couldn’t get 12ns ram in this size

EDIT: burst mode alpha now in the repo (confirmed working at 50Mhz).

[pipper]

Not sure if you’ve seen this, but it’s a good read.
http://amigadev.elowar.com/read/ADCD.../node0161.html

Successfully flashed CPLDs's! I was almost convinced I was doing something completely wrong after double checking all connections and still getting a "no JTAG chain found" message. I was trying to flash via Raspberry Pi and using PWR1 connection to power the board. Almost ready to give up for the day, I tried the same but now powering the board by placing it in the Amiga, and voila, it worked! Should the PWR1 method work for TF530 rev3?

For those of you looking for a rev3 board, after flashing my CPLDs I'm confident of getting my board to work which means I have some to spare of my DirtPCB proto pack ordered back in February (took me a while to find the time to actually start building ;-)). PM if you're interested, reasonable price of course (but needs to come from the Netherlands, so some postage fees might be needed).

[alenppc]

Full 1.5 meg slow-fast now working correctly.

And a pic of the performance test at 36 mhz with dburst enabled (approx 70% faster than stock A3000).

[8 Bit Dreams]

i am still impressed about today's stream! Excellent work, Stephen!
Hope to see FW backport to TF530 soon!!!

[chue]

One question about the stream today, Stephen: will the TF534 require a full 68030 (not EC)?

Here you mention something about disabling caches using the MMU:

https://youtu.be/iAxF-GbAXCc?t=1135

[plasmab]

Originally Posted by chue

One question about the stream today, Stephen: will the TF534 require a full 68030 (not EC)?

Here you mention something about disabling caches using the MMU:

[ Show youtube player ]

You just dont get an easy way to put ROM in RAM with CPU FASTROM. I was worried about the caches with the slow ram area but Alen has confirmed this isnt an issue. So you can use either MMU or non-MMU CPUs with the TF53x.

[plasmab]

Originally Posted by alenppc

Full 1.5 meg slow-fast now working correctly.

And a pic of the performance test at 36 mhz with dburst enabled (approx 70% faster than stock A3000).

Excellent. Glad to hear it.

Originally Posted by 8 Bit Dreams

i am still impressed about today's stream! Excellent work, Stephen!
Hope to see FW backport to TF530 soon!!!

It was a good day. You will have another TF534 pcb in the post tomorrow.

If only we can find 2Mb versions of those static ram chips. Then we could have a TF538.

[hooleydog]

Where's my TF534 pcb SOB!!!!

[CRP]

Originally Posted by ray

Successfully flashed CPLDs's! I was almost convinced I was doing something completely wrong after double checking all connections and still getting a "no JTAG chain found" message. I was trying to flash via Raspberry Pi and using PWR1 connection to power the board. Almost ready to give up for the day, I tried the same but now powering the board by placing it in the Amiga, and voila, it worked! Should the PWR1 method work for TF530 rev3?

I have been able to successfully program the CPLDs with a Raspberry PI while having the board outside an Amiga, powered by an external 5V power supply.

[8 Bit Dreams]

Well, spent a hour looking for 5.5v chips - no chances to find something for a reasonable price.. Seems the next step will be XC95288XL or XC95144XL with implemented level shifting to be able to use 3.6v chips...
In that case we can use something like this:
https://www.digikey.de/product-detai...259-ND/5214135

or maybe someone want to try run 3.6v chips on 5v? Then try this:
https://www.digikey.de/product-detai...116-ND/4844184
is there actually free space in tre RAM cpld? Maybe actual design allows to inplement level shifting?

Well, actually there is one chip, that fits our needs, but with different footprint:
https://www.digikey.de/product-detai...464-ND/7791412

[plasmab]

Originally Posted by 8 Bit Dreams

Well, spent a hour looking for 5.5v chips - no chances to find something for a reasonable price.. Seems the next step will be XC95288XL or XC95144XL with implemented level shifting to be able to use 3.6v chips...
In that case we can use something like this:
https://www.digikey.de/product-detai...259-ND/5214135

I already have a plan for SDRAM but thats a complete redesign. Wont happen on the 5xx first. The 53X series is SRAM only. Presume you realise thats an SDRAM chip?

[alenppc]

I bumped the clock back to 50 Mhz and installed the 3.1.4 rom. Annoyingly, CPU Fastrom support was removed from the new OS, so I will be using the old CPU command for now.

[plasmab]

Originally Posted by alenppc

I bumped the clock back to 50 Mhz and installed the 3.1.4 rom. Annoyingly, CPU Fastrom support was removed from the new OS, so I will be using the old CPU command for now.

Oh I shall have a mighty go at Hyperion for that on stream at some point

[utri007]

Originally Posted by alenppc

I bumped the clock back to 50 Mhz and installed the 3.1.4 rom. Annoyingly, CPU Fastrom support was removed from the new OS, so I will be using the old CPU command for now.

I asked CPU fastrom from Thor when I looked solution to map my 1mb kickstart to fast ram. CPU fastrom worked with 1mb kickstart. He said that it is not protected could be over writen any time.

MuLibs does that http://aminet.net/package/util/sys/Mu680x0Libs

[nogginthenog]

Originally Posted by plasmab

You just dont get an easy way to put ROM in RAM with CPU FASTROM.

Just FYI skick (Aminet) can map a Kickstart into RAM on MMU-less CPUs. It does this by patching the Kickstart. Only common Kickstarts are supported and the 'ROM' will not be write-protected. Gives a nice speed boost though.

[plasmab]

Originally Posted by alenppc

I bumped the clock back to 50 Mhz and installed the 3.1.4 rom. Annoyingly, CPU Fastrom support was removed from the new OS, so I will be using the old CPU command for now.

Hows the stability?

[alenppc]

Originally Posted by plasmab

Hows the stability?

I used it for a couple of hours last night with no issues. It gave me a few troubles when first powered up (red/green/yellow screens at random) but once it started it was OK. I suspect the RAM timing is probably at the limit at this point.

[SpeedGeek]

Originally Posted by utri007

I asked CPU fastrom from Thor when I looked solution to map my 1mb kickstart to fast ram. CPU fastrom worked with 1mb kickstart. He said that it is not protected could be over writen any time.

MuLibs does that http://aminet.net/package/util/sys/Mu680x0Libs

MMU write protection is over-rated. There are very many ways to crash AmigaOS. So any software hack or unsafe code which can do an illegal write to any task, program data or system allocated memory space can mess things up just as easily as the remapped Kickstart ROM image. Also, any write to the standard $F80000 ROM space will generate a /BERR crash (unless a software handler has been installed to prevent it).

Softkick users have been operating without the benefit of MMU protection for many years now and they don't seem to worry much about it. At best MMU write protection increases the chance of generating a "Software Error" which is useful for debugging purposes. However, the disadvantage is a much larger MMU table (e.g. Enforcer). Hence, more memory usage and reduced MMU performance.

The AmigaOS CPU command (provided by Commodore and H&P) utilizes a 32K page size with a short format early termination MMU table. Hence, it provides the very fastest MMU translation.

[bugsymalone666]

So todays question of the day to anyone building these things, I have most parts coming from DigiKey, but I was unable to find a PGA128 socket for the 68030 (mines a 68EC030 @40mhz when it gets here)

Seems PGA 128 sockets are rare, can you just build them using SIL socket headers instead?

I think I'll be fine putting most of it together, its just the CPLD's I worry about, the first one I soldered a few months back I cocked up slightly (too much Solder) and I have a USB microscope somewhere, then I will build it on a nice flat desk and be very very careful.