09 May 2012, 14:51 | #41 |
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^^^ yes one of those would be cool
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09 May 2012, 15:18 | #42 |
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@ Boboo_SK Yes I know that RAM added later but wanted to say that only CPLD can be used here for as,r/w,uds,lds and dtack and also for adding memory so GAL can be removed but as you started with GALs in your earlier projects I understand why you continued to use it, but now it is not needed and it is waste of space, time for programming and increase production cost. So it is hard to produce something like this because you need GALEP or some other programmer with expensive socket adapter. Instead this, on that place where is GAL you can add Altera Max or something and use simple JTAG chain to get everything working with just one logic device instead of two. But again I don't see the point because we are stuck with little memory. Start working with FPGA's and you will understand why I m telling that there is no point of building anything else because we can add to FPGA everything even wireless, usb etc... And drivers are already there for many things.
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10 May 2012, 01:09 | #43 |
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Well i'm interested, if a production is possible sign me up for 1 4MB and a 8 MB version . Will be following this thread..
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10 May 2012, 08:49 | #44 |
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i have 24 ram for 12 expansion, i can create one past 20 maj for test on a600
if insert a socket for 68000 dip for use with a500, cdtv and a2000, i suppose increment of interest. |
10 May 2012, 12:15 | #45 |
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@ majsta
You still need to get a lot of experience, than you will understand that FPGA is not the recipe :-) Last edited by Boboo_SK; 10 May 2012 at 15:07. |
10 May 2012, 14:57 | #46 |
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Hehe my friend I m in the mission to prove that you and everyone else is wrong If you could see my yesterdays testings you could understand why I m going this way
Last edited by majsta; 12 May 2012 at 22:31. |
10 May 2012, 15:50 | #47 |
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So question is, how long before it is usable? i know you've been working on this for a while. I've seen a lot of projects start and for one reason or another just fizzle away. If this project is going to be completed soon and at a small cost then it would be worth buying instead of a straight forward memory expansion, if its going to be a while then people get impatient and look for other available options
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10 May 2012, 17:08 | #48 |
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Yes I understand that but but as you helped me be shore that I will never forget you I m honest person. So current status is working accelerator and now I m trying to take over the bus and disable old CPU. How much time, maybe few days maybe few years, with this things you ll never know as there is noone who wants to share information's with me. I only said on this topic that I don't see any point of building this mem upgrades when I already have board with SDRAM on it and it is easy to use my design to add that memory only without adding another emulated CPU which is my goal. But in the other hand every hardware for Amiga is treasure and even I ll build one A600 with just mem upgrade just to play games it is enough. Only thing I can promise I ll never give up I m not that kind of person.
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10 May 2012, 17:32 | #49 | |
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Quote:
Posting questions is probably the best way to start in the Hardware threads, you'd be surprised hopefully of the knowledge of some people. |
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12 May 2012, 19:03 | #50 |
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4mb ram layout
Hi All,
If i was to build this 4mb expansion board and if i was to create a layout, would the layout shown below work in an A600. I dont know of all the different addons etc that could be used in conjuction with this so here it is, would this layout interfere with any other addons ? And yup, this board is pretty dead lol |
12 May 2012, 19:08 | #51 | |
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Quote:
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12 May 2012, 20:26 | #52 |
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Yes this is ok. But you didn't think about JTAG header but it can be removed once device is programmed. But if you leave it it could cause problems so find place for it. And if you want to use that try hole socket you could get lot of problems there. You need to investigate lot of things there to understand that socket because it can't be used like you want it as shown on that image!!! PLCC-68 socket who can be mounted on surface is easy to use but this one is not!
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12 May 2012, 20:35 | #53 | |
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Quote:
The 68 pin plcc socket fits on the underside, and the jtag header is not really required as the chips can be programmed off my master board and the 7032 can be removed via a plcc socket which would be used. I would probably add a jtag header but that can be put pretty well anywhere, main thing is to get all data/address lines in |
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12 May 2012, 20:37 | #54 | |
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12 May 2012, 20:42 | #55 |
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I reckon about $30, dependent on shipping charges, i am trying to buy enough for a bulk order but at the same time trying not to buy too many so i don't get stuck with excess parts. I am thinking about 50 boards
but as always subject to change edit, may have to change design as the way i have it would cause data and address lines to cross which is not good |
12 May 2012, 20:56 | #56 | |
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12 May 2012, 21:05 | #57 | |
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I mirrored the socket, I have put one of my 68 pin sockets over the cpu and checked clearance, if i have to create a daughter board then so be it. I have mapped the pins to allow for the socket being upside down/back to front. I can post a pic of the socket sitting nice and snug |
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12 May 2012, 21:27 | #58 |
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Ok thats ok
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12 May 2012, 21:41 | #59 |
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50 boards is good for the first batch.
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13 May 2012, 03:54 | #60 |
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Appears to clear the A603 in my bog-standard A600, which also has your excellent adapter board kipper! If its mainly aimed at un-accellerated machines a board around the template dimensions should be sweet, even with various IDE-flash adapters and cables. Rom switcher cards??? Height over the lower DRAM to keyboard clearance maybe an issue, otherwise, you've got the ball, run with it, and count me in for one!
Last edited by mutch; 13 May 2012 at 05:06. |
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