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Old 17 February 2020, 10:48   #161
mkstr
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First of all big thank you to all those working on this project.

With regards to SD card feature; is there any advantage of having an SD slot instead of an IDE header?
I ask as for the IDE header there are multiple adapters available to many different mediums such as SD, micro-SD, CF, HDD, SSD, etc.
Mainly size - the board won't be big enough to accommodate an IDE header without compromising elsewhere. Also because it allows us to put a processing shim in between the card and what the Amiga sees, which opens up various nice possibilities that I will leave as a surprise for later (when I've proved they work!)
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Old 17 February 2020, 11:14   #162
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Looking forward to see more of this

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Mainly size - the board won't be big enough to accommodate an IDE header without compromising elsewhere. Also because it allows us to put a processing shim in between the card and what the Amiga sees, which opens up various nice possibilities that I will leave as a surprise for later (when I've proved they work!)
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Old 17 February 2020, 15:00   #163
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Looking forward to see more of this
Yup, it would be nice if we could get rid of the HDD/CF card. I think there are probably only a handful of users that still use a HDD.
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Old 17 February 2020, 20:23   #164
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I was mostly referring to the "surprise for later" mentioned by mkstr. What I said previously was not related to me preferring one storage format over another but rather wishful thinking that an interface good for all storage formats would be possible. I do however understand mkstr point that this is probably not possible when you consider other design decisions.

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Yup, it would be nice if we could get rid of the HDD/CF card. I think there are probably only a handful of users that still use a HDD.
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Old 19 February 2020, 14:03   #165
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a little quiet at the moment. Work is ongoing to get the next phase done and progress is great. i have sent away my adapter designs for both the a600 and CD32 adapters to make sure there are no errors. Probably a few weeks for those as i am getting them shipped slow (cheap) mail
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Old 20 February 2020, 00:41   #166
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I wonder if anyone with 10k+ to spare would be willing to pay for a cheap process ASIC of one of the open source 68k cores. Prices have come down a lot thanks to services that support multi-project wafers (e.g. MOSIS), and a real physical build would let you run it a lot faster than on an FPGA.

The speed could probably be up there with the more advanced superscalar designs like Apollo/Vampire core in an ASIC vs FPGA scenario.
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Old 20 February 2020, 02:43   #167
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I'm not sure on the projected cost you mentioned, i think it would prob cost a bit more and of course you hope that no errors creep into the layout etc before the final process takes place. A crowdfunding or other means of fundraising could probably help and then of course it is about trying to get a customer base to take advantage and recoup costs
The core performance would definitely be better and this would probably get the attention of the open source followers that would like to see this happen. With the high risk involved in a massive outlay i don't think there would be many if anyone that would fund a project like this. I think this is why open source nowadays on big projects is difficult unless a crowdfunding funds the entire cost
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Old 20 February 2020, 03:17   #168
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I'm not sure on the projected cost you mentioned, i think it would prob cost a bit more and of course you hope that no errors creep into the layout etc before the final process takes place. A crowdfunding or other means of fundraising could probably help and then of course it is about trying to get a customer base to take advantage and recoup costs
The core performance would definitely be better and this would probably get the attention of the open source followers that would like to see this happen. With the high risk involved in a massive outlay i don't think there would be many if anyone that would fund a project like this. I think this is why open source nowadays on big projects is difficult unless a crowdfunding funds the entire cost
The cost isn't so bad the older the process node you look at. There's lots of old fabs that have long paid off their construction costs and now can't produce competitive silicon for large-scale products, so they cater to producing smaller run ASICs as well as second-source replacement parts for old equipment.
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Old 20 February 2020, 09:52   #169
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The cost isn't so bad the older the process node you look at. There's lots of old fabs that have long paid off their construction costs and now can't produce competitive silicon for large-scale products, so they cater to producing smaller run ASICs as well as second-source replacement parts for old equipment.
Would an ASIC on an ancient node actually end up being faster than an FPGA on a modern, smaller one? I haven't done an ASIC so that isn't a rhetorical question.

I actually think that if there's appetite for something like this then it would be better spent crowdfunding development of an open-source superscalar core first. Presumably there are speed benefits in having a more pipelined architecture for an ASIC design just as there are in an FPGA.
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Old 20 February 2020, 15:19   #170
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One gigantic hurdle at a time!
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Old 20 February 2020, 16:24   #171
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Would an ASIC on an ancient node actually end up being faster than an FPGA on a modern, smaller one? I haven't done an ASIC so that isn't a rhetorical question.
Really as long as the process node isn't *too* ancient, not that much. Going back to 65nm for instance (from 2005) wouldn't cost you much in clock frequency. Gains from transistor density over the past 15 years have not yielded much in the way of performance improvements -- just the ability to pack more into the same space. A 65nm ASIC is still gonna smoke a 28nm Cyclone V.

I'm not an expert but from what I've read, performance gains should be on the order of 5x. Obviously this would be even faster with a proper superscalar core, but on the other hand a simpler physically smaller core is cheaper since it uses less space on a multi project wafer.
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Old 20 February 2020, 16:31   #172
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Asic would be nice, My thoughts are, Let's see where this project takes us, i know the final product will be loaded with some very rich features and i think if there is a lot of interest then this can be ported to ASIC, and by high, it means there will be money available to take it to the next level.

as AJcopland stated, one gigantic hurdle at a time
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Old 20 February 2020, 16:48   #173
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I think it was one of the RISC-V architects who mentioned you could get ASICs done for $5K nowadays. That sounds like a high probability successful Kickstarter.
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Old 21 February 2020, 22:03   #174
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Lots of great positive feedback, so nice to see that.
i have been contacted on FB and Discord, lots of questions and interest..
thanks everyone for the positive feedback
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Old 24 February 2020, 02:11   #175
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time for a quick update, Both adapter boards (CD32 and A600 adapter boards) are on the way to me, hopefully the slow boat ride will kill off any coronavirus that may be hitchig a ride .

I checked out some of my old accelerator boards for the a500 to see if they would fit in the a600 and unfortunately they wont fit as the fittings on the boards i tried are either the wrong way and the connectors for hdmi etc will not be accessible or layout conflicts with onboard components. Most of the A500 accelerator boards are 100mm x 100mm square and i have checked to see if they will sit inside without interfering and it does not look good.. There is also a height issue for those boards that are using CF cards, they will either interfere with the upper case or the keyboard. I will release the board files for the adapter once it is 100% checked.

Mike should hopefully have an update soon for the thread, i know you guys are as patient as me . He will post as soon as he has something to show.
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Old 24 February 2020, 11:00   #176
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Looking forward to the A600 adaptor and board files if it all works, as I'll still be looking to rotate the DIP to allow larger boards to fit without hitting the back of the case.

Though height will still be an issue with potentially hitting the bottom of the keyboard. Not such an issue for us with Checkmate cases though.
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Old 24 February 2020, 15:13   #177
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personally I think the height issue is unavoidable. And can be solved by new cases/leaving the top off.

but would be good to have an adaptor that didnt push the connections ie hdmi behind the current layout
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Old 25 February 2020, 17:17   #178
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personally I think the height issue is unavoidable. And can be solved by new cases/leaving the top off.

but would be good to have an adaptor that didnt push the connections ie hdmi behind the current layout

I think it would be possible for most of the existing a500 boards to be redesigned to fit and i am willing to help others by sharing this design. A CF card would make it difficult and also if a 68030 etc was socketed to the board it would also make the height probably too high. I am obviously biased as i know what features this board will have and that it will have no issues fitting in all of the Amiga platforms and some of the Amigas headroom is at a premium.
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Old 25 February 2020, 17:21   #179
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Originally Posted by scu98rkr View Post
personally I think the height issue is unavoidable. And can be solved by new cases/leaving the top off.

These are already available

https://www.plexilaser.de/Acrylglas-...-600-Teilesatz
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Old 25 February 2020, 17:24   #180
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very nice, not too shabby at all!



edit, aren't there replacement a600 cases in the works also ?
.

Last edited by kipper2k; 25 February 2020 at 17:36.
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