English Amiga Board


Go Back   English Amiga Board > Support > support.WinUAE

 
 
Thread Tools
Old 29 February 2020, 20:35   #1
Toni Wilen
WinUAE developer
 
Join Date: Aug 2001
Location: Hämeenlinna/Finland
Age: 45
Posts: 23,969
Next WinUAE beta series preview

Next WinUAE beta series preview, version number yet unknown, start date is unknown (Late march, early April?).

This thread is not locked but don't ask about any alpha development version bugs, it is still work in progress.

--

Another quite useless new feature: cycle-accurate 68010! Includes full and accurate 68010 loop mode emulation.

Main updates:

- 68000 emulation is now fully(*) accurate, functionally and in cycle level, including exception side-effects (undefined flags and register contents etc). Cycle counts are also correct in prefetch (more compatible) mode if nothing steals cycles from the CPU.
- 68000 common instructions cycle count without more compatible are also accurate unless instruction has variable cycle count (like MUL/DIV and others).
* = IPL sampling time to interrupt level change detection is not 100% accurate.
- 68010 emulation is now cycle-accurate, including loop mode. (Exception timing/side-effects, mainly bus error undefined flags are wrong. Address errors are correct)

- 68000 address error and bus error emulation updates, all side-effects/undocumented behaviors are now emulated. Prefetch generated bus errors are now 100% functionally accurate (Including possibly partially modified flags, partially modified registers etc..) and cycle accurate. Special case example: TRAPV, if prefetch causes bus error and V is set: bus error stacked SR field always has S-bit set and T is always cleared. If V was not set: stacked SR field contents are as expected. Another more common result: if long word is being read or written to and access causes bus or address error: CCR Z and N flags are set using only low 16-bit of long word. CPU tester prefetch bus error testing mode added.
- 68010 loop mode emulation (prefetch and ce only) NOTE: when stepping loop mode in UAE debugger, looped instruction appears to be skipped because in loop mode it is merged with DBcc execution.
- 68010 loop mode is cycle-accurate. Cycle totals are correct but idle cycle ordering may not be fully correct. (TODO: do some logic analyzer checks)
- 68010 accurate address errors and exception stack frame emulation (only documented part of stack frame, it has lots of undefined fields, like 68020/030 bus/address error to allow instruction continuation after the fault/fault retry with RTE. This is not emulated). Prefetch/ce only.
- 68010 read bus errors accurately emulated. (Except RTE support like above)
- 68010 cycle count adjustments. Most 68010 cycle counts are correct now. (TODO: recheck later)
- MOVES was 68020+ instruction. It was introduced in 68010.
- BKPT was 68020+ instruction. It was introduced in 68010. It is illegal instruction (at least without debugging hardware), only difference is that it executes break point access cycle which delays illegal instruction by 4 cycles compared to normal illegal instruction.
- 68030 MMU emulation simplified and optimized.
- 68030 MMU seems to do -(an)/(an)+ adjustment before bus error is detected and original register content is not restored when bus error exception starts. This is now emulated. No programs should care.
- gencpu now automatically and properly indents generated cpuemu_xxx.cpp files.
- 68000-010 CPU internal IPL change detection timing is now more accurate (but not 100% correct) and more optimal.
- 68000-010 CPU internal IPL change detection timing is now also emulated in prefetch mode without cycle-exact. (IK+, Warhead, etc sound now works without cycle-exact)
- 68010 RTE format error exception does not clear trace flag. 68020+ RTE format error exception clears it.
- 68000/010 odd exception vector generated address error stack frame is now correct. Tester support added. Odd bus error or address error vector will halt the CPU.
- 68000 exception (including interrupts) cycle usage also validated
- 68000 BTST Dn,#x was 2 cycles too fast.
- 68000 DIVU/DIVS divide by zero exception processing starts after 4 cycles (was zero).
- 68000 JMP and JSR address error check was before EA calculation, 2-6 cycles too early.
- 68000 ADDX.L -(an),-(an) and SUBX.L -(an),-(an) had wrong cycle order: it is reada+2,reada+0,readb+2,readb+0,writec+2,prefetch,writec+0 (was prefetch,writec+2,writec+0)
- Lots of approximate (with or without prefetch) 68000 mode instruction total cycle count fixes. Cycle counts are now 100% correct.
- 68010 is now cycle accurate.
- 68010 MOVES.W an,-(an)/(an)+ and both source and destination an is same register: modified register content is stored if size is word. MOVES.L stores original register content.
- 68000 MOVE causing write address error: address error was checked too early, after read, even if it was followed by prefetch before write.

- Do not enable filter detected borders in autoscale center mode.
- List all enabled hardware built-in HD expansions first in hardfile/drive controller selection.
- Disassembler now disassembles MOVEQ, ADDQ and SUBQ correctly (previously it was disassembled as MOVE.L #, ADD.x #..), EXT.B -> EXTB.L. Assembler also didn't support byte or word size ADDQ/SUBQ variants.
- Disassembler shows MOVEC inside [] if used control register is not supported by currently selected CPU model.
- Ignore ncap/winpcap dll version because recent ncap versions have smaller version number than old winpcap versions.
- On screen led floppy leds have brighter border if inserted disk is write protected. (Color/shape may change in future updates)
- Hardital Dotto IDE controller emulation.
- CD32 ROM delay loop patch was skipped because of initialization order change in 4.3.0. Broke CD32 CD if CPU speed was too fast.
- Debugger W command used white space stripping parsing functions.
- RDB HDF max physical block size was 2048 and larger block size was not out of range checked causing buffer overflow. Max is now 8k and larger sizes are ignored.
- If disk read DMA was started without selected drives, it was always emulated in turbo mode. (Probably broken whan Amax floppy support was added)
- CD32 pad red button didn't always work as a normal fire button, depending on how it was configured. (4.3.0)
- Ignore next key release after exiting debugger. (Only if following key event is release, if next is key press, next release is handled normally)
- GUI Reset button now also copies current GUI config to active config. Normally only config entries that support on the fly changes are active after reset but because Reset button does cold reset, all changed config entries can be safely enabled. (For example Harddrive panel automount options)
- Paula has 2 CCK delay between AUDxDAT write and AUDxLEN counting down. (http://eab.abime.net/showthread.php?t=100311)
- DMA wait hack (automatically work around audio routines that have CPU delay loops) now also checks if CPU has executed enough instructions between DMA off and DMA on because there are also few bad audio routines that unnecessarily disable audio DMA and then re-enable it quickly. Log also if audio dma hack activates (first 100 times only to prevent possible log flood)
- Debugger memwatch points accessed random memory (and possibly crashed) if CPU was 24-bit but accessed address was outside of 24-bit address space.
- Interrupt delays rewritten to match real hardware better. Only Paula external interrupt pins (INT 2, 3 and 6) have delays (4 CCK!), internally generated interrupts don't have delays.
- 1x-8x CPU multipliers are now also supported in prefetch (more compatible) CPU mode.
- Some RTG to RTG mode resolution switches didn't resize windowed mode correctly (4300b1)
- Keyboard resync didn't replace old key code with new (zero) key code.
- Emulated CIA-B serial port which is connected to parallel port busy and paper out lines (CIA-A SP is connected to keyboard). Perhaps some diagnostics software uses this connection to do simple partial CIA port test without extra hardware.
- Emulated CIA-B timer mode that counts CNT (serial port clock pin) pulses. Probably no program cares.
- Emulated CIA-B PBON+OUTMODE. PB6 and PB7 are connected to floppy drive /MOTOR and /SEL3 signals. Most likely no program cares, part 2. But really weird program can at least in theory control floppy motor by starting and stopping CIA-B timer B in continuous mode...
- If 2 light guns enabled, if gun 2 moves, enable only gun 2 crosshair. Previously first gun 1 move enabled both crosshairs.

68010 loop mode:

Loop mode is basically <supported single word instruction> + DBcc loop that uses CPU internal 2 prefetch registers and instruction decode storage register as a cache for all 3 words (looped instruction, DBcc and DBcc offset). Loop runs without any prefetch memory reads.

- Most instructions have same cycle totals in loop mode. Prefetches are usually replaced with 4 idle cycles. Some only have 2, some add 2 cycles.
- DBcc execution when loop continues: 4 cycles. Non loop mode DBcc takes 10 cycles so usually at least 6 cycles is saved per round.
- When DBcc is executed that matches all loop conditions and loop mode is not yet active, first DBcc execution takes normal 10 cycles and does normal prefetches (one for looped instruction = branch address, one for itself = branch address + 2 which seems unnecessary)
- Loop exit due to loop count expiring: no extra cycles added, 2*prefetches only.
- Loop exit due to condition code: adds 2 or 4 cycles (+2*prefetches), depends on looped instruction.
- Memory shift instructions (ASRW etc..) and few others add unexplained 2 extra idle cycles in loop mode.

Hardital Dotto:
- Clone of ICD AdIDE.
- Memory map and autoconfig IDs are identical.
- Driver has strings "icdboot.device", "ICD BootRom (C)1990" and "icddiskide" "hidden" in nibble part of boot ROM. All visible strings have been edited from "ICD" to "SYN". Almost identical to already dumped ICD AdIDE ROMs, probably based on v32 AdIDE ROM (which is not yet dumped).
Toni Wilen is online now  
Old 29 February 2020, 20:54   #2
Pyromania
Moderator

Pyromania's Avatar
 
Join Date: Jan 2002
Location: Chicago, IL
Posts: 2,452
Thanx Toni.
Pyromania is offline  
Old 01 March 2020, 11:55   #3
ransom1122
Registered User
ransom1122's Avatar
 
Join Date: Aug 2011
Location: Omnicorp
Posts: 4,036
Wow, haven't you been busy. Thx
ransom1122 is offline  
Old 01 March 2020, 12:54   #4
Viceroy
Registered User
 
Join Date: Jul 2006
Location: Sunderland
Posts: 674
I can't believe how you find so much to improve on :-)
Viceroy is offline  
Old 01 March 2020, 13:22   #5
DamienD
disengaged
DamienD's Avatar
 
Join Date: Aug 2005
Location: London / Sydney
Age: 43
Posts: 17,765
Cheers Toni
DamienD is offline  
Old 01 March 2020, 14:58   #6
Valken
Registered User
 
Join Date: Feb 2009
Location: Amiga
Posts: 287
Looking forward to the next series...
Valken is offline  
Old 01 March 2020, 16:54   #7
chip
Amiga Demoscene Archive !
 
Join Date: Oct 2012
Location: Italy
Age: 45
Posts: 1,805
Impressive list of improvements
chip is offline  
Old 01 March 2020, 17:35   #8
Toni Wilen
WinUAE developer
 
Join Date: Aug 2001
Location: Hämeenlinna/Finland
Age: 45
Posts: 23,969
Most of them makes no difference, for example practically no one uses 68010 CPU or needs 68010 CPU.

Most of these are only for completeness and "side-effect" of my cpu tester enabling easy and quick way to validate emulated CPU compatibility against real CPU.
Toni Wilen is online now  
Old 01 March 2020, 19:11   #9
StevenJGore
Amiga Fanatic

StevenJGore's Avatar
 
Join Date: Feb 2004
Location: North Yorkshire, UK
Age: 42
Posts: 525
Awesome change list, but I think you missed this from the list that you fixed right at the start of the year (relating to MDS image reading being broken since 4.1.0).

http://eab.abime.net/showpost.php?p=1368535&postcount=8

Brilliant work as always!
StevenJGore is offline  
Old 01 March 2020, 21:19   #10
Zilog
Registered User

 
Join Date: May 2014
Location: Italy
Posts: 304
Great! Thanks Toni!
Zilog is offline  
Old 02 March 2020, 01:32   #11
msayed1977
Better than the Original
msayed1977's Avatar
 
Join Date: May 2008
Location: Cairo, Egypt
Posts: 149
Great effort, Toni,
But, I would like to remind you of 2 things:
1. You have told us that by the end of the next summer you will correct some of the cycle timing of 68020 emulation. It is currently too fast.

2. You haven't yet made 68000-010 CPU internal IPL change detection timing 100 percent accurate.


I hope you consider implementing both of them very soon.
Also, I hope you try to get rid (as you can) of DMA hacks.

Thank you very much.

Last edited by msayed1977; 02 March 2020 at 01:46.
msayed1977 is offline  
Old 02 March 2020, 03:30   #12
Qun Mang
Klingon for Christ
Qun Mang's Avatar
 
Join Date: Feb 2004
Location: Qo'noS
Posts: 153
The 68010 improvements may make no difference but it does remind me of the sidecar accelerator expansion I had when I owned an Amiga 500 as it used a 68010. It went right between my A500 and eventual hard drive expansion as it had a pass-through design.
Qun Mang is offline  
Old 02 March 2020, 17:44   #13
Toni Wilen
WinUAE developer
 
Join Date: Aug 2001
Location: Hämeenlinna/Finland
Age: 45
Posts: 23,969
Quote:
Originally Posted by Qun Mang View Post
The 68010 improvements may make no difference but it does remind me of the sidecar accelerator expansion I had when I owned an Amiga 500 as it used a 68010. It went right between my A500 and eventual hard drive expansion as it had a pass-through design.
68000 can be replaced with 68010, no hardware modifications needed or expansions needed (main reasons to upgrade: faster multiplication and division, loopmode. Almost fully 68000 compatible.)

Quote:
Originally Posted by msayed1977 View Post
1. You have told us that by the end of the next summer you will correct some of the cycle timing of 68020 emulation. It is currently too fast.
I have some improvement ideas but it is never going to be accurate. Unless someone finds 68020 microcode listing and documentation.

It is by design too fast because it is much safer option than being too slow. Less bad side-effects.


Quote:
2. You haven't yet made 68000-010 CPU internal IPL change detection timing 100 percent accurate.
There is no easy way to confirm this on real hardware, at least without extra hardware. This is fully 68000/010 microcode based operation and depends on used instruction. Fortunately there is no known programs that depend on this. (technically Warhead and IK+ but they already worked in CE mode, now they also work in non-CE mode)

Quote:
Also, I hope you try to get rid (as you can) of DMA hacks.
If you mean audio hacks, they are not going to go away because in "too fast" CPU modes most music routines would fail and everyone would blame emulation. (Even using 68010 or 14MHz 68000 could break some routines)
Toni Wilen is online now  
Old 02 March 2020, 22:48   #14
msayed1977
Better than the Original
msayed1977's Avatar
 
Join Date: May 2008
Location: Cairo, Egypt
Posts: 149
Thank you very much for your clarification, Toni.
msayed1977 is offline  
Old 03 March 2020, 12:42   #15
Mclane
Old retro god.

Mclane's Avatar
 
Join Date: Apr 2002
Location: Northolt, West London
Age: 59
Posts: 655
Quote:
Originally Posted by Toni Wilen View Post
If you mean audio hacks, they are not going to go away because in "too fast" CPU modes most music routines would fail and everyone would blame emulation. (Even using 68010 or 14MHz 68000 could break some routines)
This should be named the "You can't have your cake and eat it too" ruling
Mclane is offline  
Old 04 March 2020, 09:47   #16
LongLifeA1200
Registered User

LongLifeA1200's Avatar
 
Join Date: Nov 2017
Location: Amiga Kingdom
Posts: 253
Quote:
Originally Posted by Toni Wilen View Post
Another quite useless new feature: cycle-accurate 68010! Includes full and accurate 68010 loop mode emulation.
Quote:
Originally Posted by Toni Wilen View Post
Most of them makes no difference, for example practically no one uses 68010 CPU or needs 68010 CPU.

Most of these are only for completeness and "side-effect" of my cpu tester enabling easy and quick way to validate emulated CPU compatibility against real CPU.
Still very much appreciated none the less.
LongLifeA1200 is offline  
Old 05 March 2020, 16:19   #17
Diddly
Registered User

 
Join Date: Mar 2020
Location: Farnborough
Posts: 1
Keep up the good work Toni!!!!
Diddly is offline  
Old 08 April 2020, 08:17   #18
Toni Wilen
WinUAE developer
 
Join Date: Aug 2001
Location: Hämeenlinna/Finland
Age: 45
Posts: 23,969
Off topic cleanup. Becomes less strict when official betas start.
Toni Wilen is online now  
 


Currently Active Users Viewing This Thread: 1 (0 members and 1 guests)
 
Thread Tools

Similar Threads
Thread Thread Starter Forum Replies Last Post
WinUAE 4.2.0 beta series Toni Wilen support.WinUAE 69 09 April 2019 18:31
WinUAE 2.7.0 beta series Toni Wilen support.WinUAE 326 03 December 2013 23:37
WinUAE 2.6.0 beta series Toni Wilen support.WinUAE 271 14 May 2013 16:51
WinUAE 2.3.1 beta series Toni Wilen support.WinUAE 90 23 February 2011 21:17
WinUAE 2.0.1 beta series Toni Wilen support.WinUAE 14 22 December 2009 18:46

Posting Rules
You may not post new threads
You may not post replies
You may not post attachments
You may not edit your posts

BB code is On
Smilies are On
[IMG] code is On
HTML code is Off

Forum Jump


All times are GMT +2. The time now is 07:26.


Powered by vBulletin® Version 3.8.11
Copyright ©2000 - 2020, vBulletin Solutions Inc.
Page generated in 0.09469 seconds with 15 queries