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Old 02 June 2020, 04:17   #1
loonsta
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Schematics of custom Amiga chip internals?

I've been doing a lot of searching to try and track these schematics down without any luck.


I found a video where Jerri Ellsworth mentions that somoene slipped her some schematics when she was working on A500 in a Joystick, and have tweeted her asking if she might release them.


Does anyone know of anyone else that has any of them and might be willing to share? I am thinking of sourching at least a spare set of A1200 chips and sending them to some people that decap and take high resolution photo's so that they could be properly reverse engineered.


It seems like it would be of huge benefit to the community..


What do people think?

Last edited by loonsta; 02 June 2020 at 07:38.
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Old 02 June 2020, 07:49   #2
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Costs a lot of money to reverse-engineer the chips that way. Thanks for using your millions for our benefit. :-)
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Old 02 June 2020, 08:01   #3
loonsta
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Well I already got response from one of the three websites I had found that do this type of work this and that one only asks a $25-200USD donation per chip to get it decapped and imaged for public use.

I've already confirmed that I will be able to get the chips, with my source for them having the only term being that they do Akiko as well,, so if a few people help with the funding for the donations to the people uncapping and imaging them then it's entirely acheivable.



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Costs a lot of money to reverse-engineer the chips that way. Thanks for using your millions for our benefit. :-)
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Old 02 June 2020, 08:20   #4
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Decapping the chips and getting images is one thing. Reverse engineering those images is another, and that will be far more expensive than $25-$200USD.
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Old 02 June 2020, 08:34   #5
loonsta
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Thats a pretty defeatist attitude to take.


1. Decapping and imaging is required to start the process
2. Making the images open source is better than the current state
3. There are people that reverse this stuff for fun
4. There are probably capable people in the Amiga community that would invest time to reverse, but can't without the images, I'd definietly be trying to reverse some myself.



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Decapping the chips and getting images is one thing. Reverse engineering those images is another, and that will be far more expensive than $25-$200USD.
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Old 02 June 2020, 08:45   #6
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Sounds like an awesome idea. These designs can be used as reference to improve the FPGA software, eventually making them as accurate as is desirable, but perhaps a few little tweaks to make them better in terms of smaller/cheaper FPGA or improved performance too.

I wonder if there is any OCR type software around for automatically reading parts of the design.

It'd be great if after the Amiga Custom chips that the 68060 could be scanned so as to make improvements to the TG68.

Great idea Loonsta
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Old 02 June 2020, 08:48   #7
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It's not a defeatist attitude. I never said that this project wasn't worth doing. I simply said that it will be a much more expensive exercise than the price you quoted.

Would the Minimig source code not provide most if not all of the needed information? Or is that not quite where it needs to be, compatibility wise?
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Old 02 June 2020, 08:58   #8
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Those FPGA reimplementations mostly based on observed behaviour as far as I understood.

I hope this project succeeds. :-)
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Old 02 June 2020, 09:09   #9
Gorf
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Alice:
https://siliconpr0n.org/map/csg/8374r3/mz_mit20x/

Denise:
https://siliconpr0n.org/map/csg/8362r8/mz_mit20x/

Paula:
https://siliconpr0n.org/map/csg/8364r4/mz_mit20x/
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Old 02 June 2020, 09:11   #10
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Thanks, and for reference this is also the site that replied to my email already.


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Old 02 June 2020, 10:00   #11
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That sounds great keep looking.

Sent from my LM-G710 using Tapatalk
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Old 02 June 2020, 10:07   #12
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TF has started a ReAgnus project, he now has a lot of resources on Agnus including the original schematics. Check around 26:28 into his youtube stream he mentions this. Great Stuff.
[ Show youtube player ]
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Old 02 June 2020, 19:19   #13
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There are a few guys that do this kind of thing for fun. It's insanely complex. IC's are full of odd things.

ElectronUpdate
https://www.youtube.com/user/electronupdate/videos

Robert Baruch
https://www.youtube.com/channel/UCBc...VGA3adg/videos

Ken Shirriff. His latest blog is about reversing parts of the 8087 math coprocessor which is a generation older than the Amiga.
https://www.righto.com/

Applied Science maybe?

Last edited by nogginthenog; 02 June 2020 at 19:35. Reason: Clarification/more info
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Old 02 June 2020, 19:45   #14
coldacid
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If I had any idea of how to analyze what I'm looking at there, I'd certainly help out. As it is, hardware is not my forté...
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Old 02 June 2020, 21:45   #15
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Amigans recap, everyone else decaps

The Amstrad CPC guys are decapping chips, I posted one off to Spain some time ago.
With all the Amiga fans in the world I am surprised there is not a decapper (?) among us.
Although how long this work results in actual exact FPGA representation is another thing.

@Chucky probably has a large source of dead Amiga chips.
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Old 03 June 2020, 00:19   #16
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I have a source for at least several of the chips we need, I have to help him clean up his amiga stockpile to confirm which exactly (which I have no issue with).



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Amigans recap, everyone else decaps
@Chucky probably has a large source of dead Amiga chips.
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Old 03 June 2020, 03:04   #17
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How does one "read" these pictures and figure out what's going on anyway?



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Old 03 June 2020, 08:55   #18
loonsta
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[ Show youtube player ]



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How does one "read" these pictures and figure out what's going on anyway?
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Old 03 June 2020, 16:52   #19
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It would be nice to get much higher res, like those of a modern phone camera so we can zoom right in.
The pictures of Paula are much better than the others that I've seen. So working on upgrading to a 16 bit version might be possible without a lot of drama.

Makes sense to start with the oldest and simplest from a learning point of view.
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Old 04 June 2020, 20:36   #20
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Your best bet would be to talk to MikeJ (FPGAArcade.com)? I think he has done a lot of work on decapping and imaging the chips for his FPGA representation.
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