21 May 2019, 22:26 | #61 | ||
Natteravn
Join Date: Nov 2009
Location: Herford / Germany
Posts: 2,496
|
Then the -devpac option is for you (and Don).
Quote:
Quote:
Indeed, that's a lot of work to determine all the optimization options, because "opt o+" sets more than PhxAss' "opt 3", and one optimization, which is enabled by default, must even be cleared. Starting in vasm default mode: Code:
opt ol+,op+,oc+,ot+,om+,oj+,o7- Code:
opt a+,ol+,op+,oc+,ot+,of+,o2+,o8+,o9+,om+,o5+,o11+,o1+,oj+,og+,o3+,o4+,o10+,o12+ |
||
21 May 2019, 22:34 | #62 |
Defendit numerus
Join Date: Mar 2017
Location: Crossing the Rubicon
Age: 53
Posts: 4,468
|
Thanks phx
|
22 May 2019, 04:38 | #63 | |
Registered User
Join Date: Mar 2018
Location: Hastings, New Zealand
Posts: 2,544
|
Quote:
Inline NOPs can be used to get subsequent code longword aligned for faster operation on a 32 or 64 bit bus, which might justify using an alignment directive which inserts NOPs. But 68k instructions have varying lengths so there are probably not many cases where this alignment would be useful (though some compilers seem it do it all the time anyway, wasting space for no good reason!). However as far as producing valid code is concerned anything goes. The compiler could just insert random garbage and it wouldn't make any difference so long as it wasn't touched. It only becomes a real problem when trying to create an identical binary from disassembled code or with a different assembler or compiler (particularly important when dealing with legacy code, as we so often are on the Amiga!). A good assembler should therefore give you full control over what filler word is used, not make assumptions that you are forced to accept. |
|
22 May 2019, 08:03 | #64 | ||
son of 68k
Join Date: Nov 2007
Location: Lyon / France
Age: 51
Posts: 5,323
|
Quote:
Else the mere presence of a label will tell you it's a NOP at startup of a routine rather than some padding. Quote:
I see no problem here. |
||
22 May 2019, 11:26 | #65 |
OCS forever!
Join Date: Mar 2019
Location: Birmingham, UK
Posts: 418
|
Opened a can of worms with this question didn't I
I've been through my source of my intro and I found I'd used ds.l/ds/b in a few places in a standard data section. Now I know that I was only getting this zeroed "back in the day" because I was using devpac and "by luck" in ASMOne I changed all these to dcb x,0. Pure BSS is zeroed on load (used for all my screen buffers) and I was clearing the screen are in each routine anyway, but as a quick check I changed it to a chip data section and filled it with $aa Lo and behold I could see glitches where my bitplanes weren't exactly lined up with my copperlist. In each routine I was sharing the screen buffer areas and they worked fine standalone. But when you put all the routines together the glitches appeared. Will be filling my buffers with $aa every so often now to check! So I had two bugs. One where I was expected something to be zeroed might not be. And one where something was zeroed but because of that was hiding a bug. Cheers all |
22 May 2019, 19:35 | #66 |
Natteravn
Join Date: Nov 2009
Location: Herford / Germany
Posts: 2,496
|
For all the friends of CNOP: I just implemented a new command line option to set the 16-bit padding value (still defaults to 0x4e71). So CNOP can also pad with zeros in vasm-standard mode (no -devpac required).
-cnop=0 (Available with tomorrow's snapshot.) |
22 May 2019, 23:14 | #67 | ||
Registered User
Join Date: Mar 2018
Location: Hastings, New Zealand
Posts: 2,544
|
Quote:
Quote:
Code:
r09648: move.w 20(A5),D0 ext.l D0 sub.l #$00000001,D0 blt.s r096a6 cmpi.l #$00000004,D0 bgt.s r096a6 asl.l #1,D0 jmp *+4(PC,D0.w) bra.s r0966c bra.s r09688 bra.s r0966c nop r0966c: move.l 26(A5),-(A7) pea a09cff ; "Minimum=%d." move.l l0ee7e,-(A7) jsr r11a0c Granted you don't see this very often. My disassembler assumes that nops are not code if they are found outside a labeled code block, but sometimes there's no label. If there is also 'data' before the nop then it gets tricky (at least if you want an accurate disassembly, rather having blocks of code shown as data). My disassembler shows it as a nop rather than cnop because it might actually be code. dc.w 0 can also be tricky to identify. Luckily the instruction ori.b #x,d0 is not often found at the start of a code block, and if the following word's value is >255 then it's almost certainly not code. dc.l 0 is easier because ori.b #0,d0 is a useless instruction. |
||
22 May 2019, 23:34 | #68 | |
Registered User
Join Date: Jan 2008
Location: Warsaw/Poland
Age: 55
Posts: 1,959
|
Quote:
|
|
23 May 2019, 00:05 | #69 |
Registered User
Join Date: May 2013
Location: Grimstad / Norway
Posts: 839
|
Two things
-It should never have been named "cnop". That kinda ties you to the mast on what you expect it to do. -I agree that $4AFC is a better pick. |
23 May 2019, 00:59 | #70 |
Defendit numerus
Join Date: Mar 2017
Location: Crossing the Rubicon
Age: 53
Posts: 4,468
|
|
23 May 2019, 01:24 | #71 | |
Defendit numerus
Join Date: Mar 2017
Location: Crossing the Rubicon
Age: 53
Posts: 4,468
|
This is a further reason not to use nop with the CNOP directive.
In that case nop is used as a code therefore a specific choice of the programmer or compiler. Nobody would use cnop in that position because it's not padding. If it were my code I would immediately recognize the situation. Quote:
I appreciate the new vasm -cnop=0option |
|
23 May 2019, 09:09 | #72 | |
Join Date: Jul 2008
Location: Sweden
Posts: 2,269
|
Quote:
nopand ori.b #0, D0aren't true no-ops, and the latter in particular will change the status flags, so there's a potential for sneaky bugs you would never get with nopor a true no-op like move.l A0, A0. |
|
23 May 2019, 09:26 | #73 | |
Defendit numerus
Join Date: Mar 2017
Location: Crossing the Rubicon
Age: 53
Posts: 4,468
|
Quote:
ori.b #0(or nop) only in specific cases (in-place code patch, if applicable), sure not in normal programming. Anyway movea.l a0,a0is a two bytes instruction and his opcode is certainly not 0.w,0.w(the reason why I use ori.b #0). Last edited by ross; 23 May 2019 at 09:37. |
|
23 May 2019, 09:35 | #74 | ||||
son of 68k
Join Date: Nov 2007
Location: Lyon / France
Age: 51
Posts: 5,323
|
Quote:
Same story when you see two nulls after a string. Is the second of any use or is it padding ? Keep it until you know for sure. Quote:
Anyway this is not a very realistic example. This kind of construct usually does not execute the nops it contains, otherwise it would just slow it down - and people who write such horrors are concerned with speed. Quote:
If you want a simple rule to follow there, never ever emit a cnop directive with a disassembler. You can, however, emit the nop or dc.w 0 with a comment if it looks suspicious. Quote:
If what you want is simple patch, use a true branch (6002). |
||||
23 May 2019, 09:47 | #75 |
Defendit numerus
Join Date: Mar 2017
Location: Crossing the Rubicon
Age: 53
Posts: 4,468
|
|
23 May 2019, 10:23 | #76 | |
Defendit numerus
Join Date: Mar 2017
Location: Crossing the Rubicon
Age: 53
Posts: 4,468
|
Quote:
I do not use this way (I edited my post where I specified that I insert a full 0.w,0.wand not a single 0.w, so ori.b #0! This is a little but significant difference (not that it changes the fact that it's dirty code ). And yes SAS/C cmpi.w usage is ... |
|
23 May 2019, 10:35 | #77 | ||
son of 68k
Join Date: Nov 2007
Location: Lyon / France
Age: 51
Posts: 5,323
|
Quote:
Quote:
Using 4e71 will ensure anyone reading the code will know what was done. And no, that it compresses a few bytes better in some cases isn't a valid reason for me |
||
23 May 2019, 10:54 | #78 | ||
Defendit numerus
Join Date: Mar 2017
Location: Crossing the Rubicon
Age: 53
Posts: 4,468
|
Quote:
Quote:
So be patient |
||
23 May 2019, 10:58 | #79 | |
son of 68k
Join Date: Nov 2007
Location: Lyon / France
Age: 51
Posts: 5,323
|
Quote:
If you want short code there are better ways : disassemble it fully and reassemble with an optimising assembler. You will get a gain in the range of the hundred, if not the thousand. |
|
23 May 2019, 11:10 | #80 | |
Defendit numerus
Join Date: Mar 2017
Location: Crossing the Rubicon
Age: 53
Posts: 4,468
|
Quote:
(contains even an emulator for the trap #1 I/O calls..). Completely disassembled, corrected, optimized and reassembled gives me an exe thousands of less bytes. I also do things properly if I want |
|
Currently Active Users Viewing This Thread: 1 (0 members and 1 guests) | |
Thread Tools | |
Similar Threads | ||||
Thread | Thread Starter | Forum | Replies | Last Post |
Issues with ORG directive (vasm + FS-UAE) | Maggot | Coders. Asm / Hardware | 15 | 05 September 2023 11:56 |
vasm basereg example directive | mcgeezer | Coders. Asm / Hardware | 7 | 18 November 2020 19:58 |
REPT directive in vasm | phx | Coders. Asm / Hardware | 8 | 01 October 2014 21:48 |
AsmOne even directive...? | pmc | Coders. General | 30 | 04 December 2009 09:33 |
Invalid Directive | Kimmo | support.WinUAE | 1 | 23 July 2004 11:23 |
|
|