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Old 13 June 2017, 12:24   #41
Toni Wilen
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I guess Masoboshi was first driver that uses MOVEP to read two IO registers that have side-effects and are access sensitive. It is also possible read order has changed randomly since the beginning.. (due to different optimization settings, different compiler version etc..)

btw, Masoboshi DMA controller seems to have two modes and extra optimization. I haven't checked SCSI but IDE does this:

- start IDE read
- in level 2 interrupt routine, it starts 256 word DMA transfer with bit 0 of dma controller "mode" register (same register also sets DMA direction, bit 7, other bits are unknown) set, polls DMA ready bit until transfer is complete, then clears the bit, starts next DMA transfer (if more data to read), Signals() driver task that handles the rest of transfer.

I assume this means first 256 word (single block) transfer steals all available bus cycles, remaining block(s) leaves some cycles for the CPU.

They made worlds first and only Amiga DMA IDE controller and then they decided that IDE CHS access is fine.. (Did they copy IDE handling from some old device driver and hacked in DMA support?)

Mythical v2.204 driver is still needed
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Old 13 June 2017, 15:28   #42
mark_k
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Quote:
Originally Posted by Toni Wilen View Post
btw, Masoboshi DMA controller seems to have two modes and extra optimization. I haven't checked SCSI but IDE does this:
Is that the "fast transfer" option? Does the driver behave differently if you toggle that using MasterInstall?

Quote:
Originally Posted by Toni Wilen View Post
They made worlds first and only Amiga DMA IDE controller and then they decided that IDE CHS access is fine.. (Did they copy IDE handling from some old device driver and hacked in DMA support?)
The driver was developed back in 1992 (probably 1991 even, since the first ads on amiga.resource.cx are from early '92). Back then, what would the benefit of supporting both CHS and LBA have been?
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Old 13 June 2017, 20:05   #43
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By the way, the earliest MasterCard advert from December 1991 (on amiga.resource.cx) shows a significantly different board layout and is SCSI-only. I wonder if those were ever sold, since all later ads mention IDE too. The Feb 1992 ad also shows that different board layout.

The June 1992 ad says "Jetzt mit DMA! Was kaum moeglich erschien, ist uns gelungen.", which via Google Translate is "Now with DMA! What seemed hardly possible, we succeeded." (I didn't bother typing up the rest of the ad text to translate it, hopefully someone else can?)

I wonder whether the earlier non-DMA boards have a different Zorro II product number, and does the already-dumped MC702 ROM work with those older boards? Perhaps they all have the same product # and the ROM works on all by checking whether the DMA controller is present?
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Old 14 June 2017, 13:51   #44
Toni Wilen
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Quote:
Originally Posted by mark_k View Post
Is that the "fast transfer" option? Does the driver behave differently if you toggle that using MasterInstall?
Maybe later..

Quote:
The driver was developed back in 1992 (probably 1991 even, since the first ads on amiga.resource.cx are from early '92). Back then, what would the benefit of supporting both CHS and LBA have been?
It just makes no sense to have so advanced hardware and optimized driver without IDE LBA support. Setting up LBA mode is much simpler, just some shifts. Internal LBA to CHS conversion is only waste of CPU time if LBA is supported. (and needs more complex calculations than shifts)

LBA has been in specs since ATA-1. Did CHS-only IDE drives really exist?

Quote:
I wonder whether the earlier non-DMA boards have a different Zorro II product number, and does the already-dumped MC702 ROM work with those older boards? Perhaps they all have the same product # and the ROM works on all by checking whether the DMA controller is present?
Driver does not seem to do any DMA checks before DMA timing test which would hang without DMA hardware.

It sounds like they scrapped original HW design and started from scratch. Big DMA chip surely wasn't part of original design and most likely IO accessing and everything needed redesign too.

EDIT: Masoboshi DMA controller registers are suspiciously similar to MC68440 registers.. Len and address registers are exactly in same offsets as 68440, second channel register set has same $40 offset.. Status bits look similar. Perhaps there is newer model in same 684xx series?

Last edited by Toni Wilen; 14 June 2017 at 14:08.
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Old 14 June 2017, 14:23   #45
mark_k
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LBA has been in specs since ATA-1. Did CHS-only IDE drives really exist?
Yes. LBA support is optional, hence why you have a bit in the identify device data. Even in ATA-2 it says "It is recommended that ATA drives over 528MB support Logical Block Addressing (LBA)."

Presumably drives larger than that which were CHS-only were produced. The 528MB arises from IBM PC/AT BIOS limitation; BIOS disk access calls were limited to C/H/S 1024/16/63.

[Does anyone have access to an Amiga which still has its factory-fitted IDE hard disk? Might be interesting to see whether any of those support LBA.]

LBA support is specified as mandatory for CompactFlash cards, for what it's worth.

Remember that the IDE/ATA specification is descended from the original IBM PC/AT hard disk controller, which was made for IBM by Western Digital. The combination of IBM PC/AT hard disk controller board + ST-506 drive could be considered equivalent to a very very early IDE drive.

This page has pics of the IBM controller cards, also technical PDFs:
http://minuszerodegrees.net/5170/cards/5170_cards.htm
http://minuszerodegrees.net/oa/OA%20...%20Adapter.pdf
http://minuszerodegrees.net/oa/OA%20...er%20-%202.pdf

Reading the PDFs, there's no mention of IDENTIFY DRIVE, so maybe the very first actually-IDE drives didn't support that either???
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Old 14 June 2017, 16:23   #46
Toni Wilen
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Masoboshi DMA controller has to be relabeled 68450, all driver reads and writes hit correct registers and set exactly right bits in config registers.

Bit which I thought was some DMA speed option, is actually generate interrupt when DMA completes. Emulation still worked because I only checked for master interrupt enable bit which is also set in this situation.
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Old 14 June 2017, 20:18   #47
mark_k
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Maybe 68440 since it only has two DMA channels?

Updated disassembly with slightly-meaningful DMAC register labels:
Code:
https://www.media!fire.com/?h7u8ky8n33kukpb
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Old 14 June 2017, 21:45   #48
Toni Wilen
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Originally Posted by mark_k View Post
Maybe 68440 since it only has two DMA channels?
Probably.. It would be easy to confirm by checking if 3rd/4rd channel IO regions reads zeros only and can't be written.

But there is still something missing, Masoboshi has PLCC chip but Motorola documentation only mentions DIP and PGA packages. Who made that "custom" chip? (custom markings but 68440 inside).
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Old 15 June 2017, 21:53   #49
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Motorola did produce a PLCC 68440, with the same number of pins as the Masoboshi chip too. See the last page of this PDF.

If it is just a plain MC68440, I don't see why Masoboshi bothered getting a custom-marked version. There must be some difference or additional circuitry inside, surely? Perhaps something to do with being "nicer" on the bus???

The amiga.resource.cx board pics show two boards. The (earlier) MC702 has this text on its chip:
MASOBOSHI
© 1992
MBI 120465
9212
Sample

The later one (same date code though):
MASOBOSHI
© 1992
MBI120465
9212
GYEUQ [not sure about those letters]

That five-letter sequence at the bottom reminds me of other Motorola chips.
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Old 16 June 2017, 11:30   #50
Toni Wilen
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I had older datasheet. (Datasheets without any date or revision information are annoying..)

Perhaps it looked cooler to have "custom" DMA chip and it was possible to buy "customized" (as in renamed) chips from Motorola. (Just wondering if GVP DMA chip is also some off the self relabeled chip too...)

(thread renamed)
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Old 17 July 2017, 16:16   #51
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The Masoboshi driver has an automatic byte-swapping feature. As I understand it (haven't bothered to double-check by reading the manual lately...), at the hardware level the Mastercard reads/writes data byte-swapped with respect to how the A600 IDE controller does it.

The Masoboshi driver detects whether the attached drive data is being read byte-swapped by e.g. looking for "DRKS" (which is "RDSK" byte-swapped). If found it sets a flag and all reads/writes are byte-swapped. That swapping obviously uses CPU time and would defeat the benefit of having DMA.

It also seems to detect PC and Atari ST disks. The manual mentions holding down a mouse button during boot to disable the auto-byte-swapping. For example if you bought a new PC-formatted HD, you wouldn't care what data is on the drive, and wouldn't want the driver to byte-swap unnecessarily. So you'd disable byte-swapping before formatting/prepping the drive on your Amiga.

Does WinUAE automatically byte-swap HDF data before the Masoboshi driver sees it, so its auto-byte-swap feature is never used?

Last edited by mark_k; 17 July 2017 at 18:01.
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Old 20 July 2017, 19:13   #52
Toni Wilen
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Does WinUAE automatically byte-swap HDF data before the Masoboshi driver sees it, so its auto-byte-swap feature is never used?
Yes. This is not good enough reason to make it configurable.
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Old 17 September 2023, 09:16   #53
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Was the 2.2.04 ROM or something better found?

I have a lead on one of these cards.
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Old 19 September 2023, 21:01   #54
Toni Wilen
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Was the 2.2.04 ROM or something better found?
No. 2.01 is still the newest available.
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