14 April 2024, 01:36 | #3621 | |
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14 April 2024, 01:42 | #3622 | ||
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This functionality was obvious and normal for Amiga users and it is quite obvious that it was not appreciated . Quote:
6MHz 286 is slower than 8MHz 68000 - i always recommends to run software like DJPEG (part of libjpeg) on Amiga and on PC to compare real speed. |
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14 April 2024, 02:13 | #3623 | |
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14 April 2024, 04:39 | #3624 | ||
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But why am I telling you this? You know it already. Quote:
"stupid management directives not to advance the chipset" - is not correct. AGA was in continuous development from 1989 to 1992. The first prototype AA chipset was produced in late November 1990. Of course it was buggy. By February 1991 it was good enough to boot Dave Haynie's A3000 Plus. Soon afterwards Irving Gould announced in an interview with Amiga Computing magazine that a new chipset was coming and should be ready "this fall". By late March 1991 they had fully working AA prototype chips, but the engineers had a list of 10 extra things they wanted to put in it. You can see where this was going. On March 28 the engineers working on AA met to decide which features to add and which they could live without. Jeff Porter then estimated that the changes would push the release date back to April 1992 (which was about right). Lew Eggebrecht (VP of Engineering) later explained why release dates kept slipping:- "We have some very free-thinking engineers... and if you don't give them specific goals they'll just continue to develop and develop. The process of converting a design to a product is something Commodore has always had trouble with. We're stopping all that." But it was too late for the A1000 Plus. As a result of the AA enhancements and other delays they missed the 1991 deadline for Christmas sales, a critical failure. That's when Sydnes, under pressure from Medhi Ali to get the new machine out, came up with the idea of an A1000+ with the ECS chipset, which nobody wanted. However in February 1992 Ali ordered Sydnes to produce a AA replacement for the A500, to be released by September 1992 (only a year after they could have if they had stuck with the original AA design). Jeff Frank then took his A600 design and turned it into the A1200. The truth is it wasn't stupid management directives that were the problem, but a lack of directives forcing the engineers to meet tight a schedule. Once Gould had announced an upcoming new chipset 'in the fall' they should have jumped to it. An A500 level machine with AA - even without any of those 10 extra features - would have hit the spot nicely. But instead of responding urgently they kept adding stuff to it, apparently not concerned about delays. In the end we got a better product I guess, but that 1 year delay was fatal. 1991 was a great year for Commodore sales, but the next year sales dropped dramatically and they lost $100 million - because engineering couldn't see when it was time to stop chipset development and get the product out! If only someone in upper management had told them not to advance the chipset, Amiga fans might not be complaining about how disappointed they were at the A1200 arriving so late. |
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14 April 2024, 06:45 | #3625 | |
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In some applications the 68000 might be faster, but on most benchmarks the PC-AT has the edge. Here are some numbers I found with Google:- Code:
IBM PC/AT 80286-6Mhz Lattice 2.15 1250 Dhrystones Amiga 500 68000 7Mhz (sc 6.00) 1333 Dhrystones Amiga 1000 AmigaDOS 68000 7.16MHz 0.54 mips IBM PC/AT PCDOS 3.0 80286 6.0MHz 0.69 mips https://litwr2.github.io/pi-spigot-benchmark/pi-spigot-benchmark.html 100 digits of Pi Amiga 500/PAL+fastRAM, 68010, 7.09 MHz 0.34 seconds IBM PC 5170 AT, 80286, 6 MHz 0.21 seconds |
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14 April 2024, 09:01 | #3626 |
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It is interesting to notice that two of the worse architectures have been very successful: x86/x64 and vga-like gfx cards. After all, are they terrible?
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14 April 2024, 09:58 | #3627 | ||||
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Also it was possible to interface PIO and SIO with 68k as there was even an (I guess) eval board Z80 interface compatible but with 68000 CPU. And I did repair in the past old machine panel with 68000 and SIO + PIO done similar way... https://bitsavers.org/pdf/colex/stdB...ds/std-68K.pdf Quote:
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14 April 2024, 10:19 | #3628 | |
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I really wonder how Commodore worked internally in the Amiga area. Did the R&D had meeting with the management to cogitate? From what you describe, it look like it was worst than the Tramiel area where the directives were at least kind of: "You and you, build an architecture to beat this competitor, we need it for Christmas. The one who fail will have its head cut." And so the C64 emerged in time. |
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14 April 2024, 10:23 | #3629 |
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Current cards are hardly VGA... they do usually revert to VGA-like behavior with no driver loaded. So like boot screens etc. But they are much more advanced. Even ARM solutions like Mali could've imitate VGA screens but that's beside the point. What's important is compatibility with current standards like Vulkan and GLES (or in case of Windows apps - DirectX) but those are quite mutable. Like DXVK which translates DX calls to Vulkan and recompiles shaders during runtime. As for x86 - that was a PITA of architecture. Just handful of registers, segmented memory and instruction length varied from few bytes to few dozens of bytes. But that's kind of also a thing of the past. Because from quite a long time internally there are a lot more registers than covered by ISA and with 64bit addition they did increase a number of GPRs in ISA to fairly decent number of 16 (with a separate set of SIMD registers also 16). So while ISA itself is still a mess compilers do a fair job and the rest is handled by execution-time optimizations of the processor itself (like OOO, prefetch, scheduling etc.) Look where is PowerPC which was looking so nicely during Pentium and Pentium II era... And IBM's Power (previously POWER) came to increase number of threads inside single core instead of aiming at performance of single thread. The biggest progress came from late bloomer - ARM - which was widely used for power efficient devices but during last decade it did reach both HPC servers with A64FX and computers with M1, M2 and M3. Why ISA or architecture isn't all that important? Because all that actually matters is what you receive and at what cost. And availability is important as well. You can buy decent x86 CPU in a shop around the corner, replace the one of previous generation and still have fairly well behaving computer. Can you do that with ARM processor? No? Aaaa...
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14 April 2024, 10:29 | #3630 | |
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"Read my lips no new chips" is a stupid management directive, and a clear directive *not* to develop new chips. As simple as that. |
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14 April 2024, 13:32 | #3631 | ||
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But it look worst than that. AGA being delayed for 6 months could look like sabotage. It has been already said but here is in context: Quote:
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14 April 2024, 13:51 | #3632 | ||||
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But hey, let's focus on functionality - so why do you need Paula in first place? to output PCM ? Use just DAC08 with 8253 as timer and something like 8257 to perform DMA... So you need to have 6 bit PWM audio level... so build some PWM or use 7497 to get better functionality. you no need Paula to get same or better functionality. You can use Pula but you need to recreate some Agnus functionality. Similar for Denise - it can be probably used alone but way easier is to use Denise with Agnus. Quote:
You can use SIO, CTC, PIO with non Z80 buses but they offer something like autovectorized interrupts designed specifically for Z80 bus and this is impractical to be used by other than Z80 CPU's - Intel LSI's are more architectural agnostic. Quote:
CIA's (8520 and 6526) was easily available form MOS and later from CSG - they was offered on market same as popular VIA 6522. Quote:
I would avoid modern terms as northbridge and southbridge using exclusive and fast interface (usually serial - btw strange that Amiga didn't used high speed serial - AMD made some TAXI chipset - serializer and deserializer AM7968/7969 but perhaps this was too much) to be not cluttered by regular buses - in Amiga RGA is just internal address bus but regular data lines (and as such bus contention is present) was used to exchange data. Ideally all Amiga functionality shall be made as single IC (OCS or at worst ECS). Btw i think i should use this as example of my point - are you consider AY-3-8910 as standard or non standard (i.e. custom) part. Last edited by pandy71; 14 April 2024 at 14:06. |
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14 April 2024, 18:09 | #3633 | |
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Let me remind you which part of Bruce opinion we're talking about in such length...
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14 April 2024, 20:16 | #3634 |
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Well... every Amiga integrated everything on mainboard (if you not count dirty workarounds) - but PC market is/was different than Amiga.
CBM started to use ASIC since first time to reduce cost and CBM keep all IP - PC is driven by spread IP and cost reduction. Gary is simple address decoder and some floppy logic, most A1000 glue logic was placed in FAT Agnus. Yes, CBM made same things as Atari - lot of custom logic to reduce overall cost - PC at the beginning used discrete standard LSI to create system architecture - merging those standard LSI's into higher integration level was started relatively late. Not sure who started this first C&T or Opti anyway for long time XT and AT was made from standard logic. But i see this process natural and quite obvious. |
15 April 2024, 00:38 | #3635 | |
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Same approach as in Atari ST emulators - by reducing number of the lines to be displayed you bumping vertical refresh rate - you can tell HW ( http://amigadev.elowar.com/read/ADCD.../node0044.html ) that end of screen was reached earlier. Simple calculation shows that (480*60)/350=82Hz , for ST this is (480*60)/400=72Hz With this refresh rate line flickering is significantly reduced. And large part of CRT's can properly display such video modes (usually they tolerate more on vertical than on horizontal). |
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15 April 2024, 07:35 | #3636 | |
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From experience, the IBM PS/2 Model 55SX (386SX-16, IBM VGA) is not a replacement for the A500 in action gaming and it's not a stock A1200-level competitor. Between Commodore's stock A1200 and IBM PS/2 Model 55SX, I'll select A1200. IBM VGA is slow despite attaching K7 Athlon XP 2200+ (1800 Mhz) to it. Meanwhile, Emu68's 1800Mhz Cortex A72 has good frame buffer results for AGA. My point, PC VGA cloners were matched with price/performance competitive X86 CPU pairing in 1991 and beyond. --- X86 has respected backward software compatibility better than the other camp. AMD used the same backward software compatibility superiority to beat Intel's Itanium i.e. it worked for Intel's IA-32 against major RISC alliances. MOS/CSG 65xx CPU family R&D pace was very slow, hence its desktop microcomputer platform vendors seek alternatives e.g. ARM, 68K, Z8000. |
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15 April 2024, 07:59 | #3637 | ||
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However I think that sending I2S serial data out of Paula to an 'industry standard' external audio DAC would be a good idea. It would cost a bit more but be a lot more flexible and produce higher quality sound. This is similar to how AGA used a 'standard' external Video DAC with built-in color palette registers rather than try to integrate it into Lisa. I also think it would be awesome to reproduce Paula with standard chips, like how the 6502 has been reproduced with standard logic gates. Obviously not cost-effective, but a great retro project! * actually more than that because it has to pull both up and down. I'm not sure how Jay Miner would have done that - perhaps a current mirror selected with bit 7, then you only need a 7 bit DAC. Quote:
In comparison, Paula was designed to work only with Agnus/Alice in the Amiga. Commodore never even hinted that it might be possible to use it on another architecture, and doing so would be rather difficult when there was no application information. Thus it would meet the definition of 'custom chip' even if Commodore didn't call it that. |
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15 April 2024, 08:12 | #3638 |
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I am hoping to do a comparison between those machines this week, if the 386SX-16 motherboard I got today works (the last one died before I got the chance). I paid $160 for it so it better work or that's it for retro PCs! The good news it has 16MB of RAM on it, so it should be able to run Doom (slowly).
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15 April 2024, 08:19 | #3639 | ||||
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The idea is software drives the hardware sales. The big elephant in the room against IBM's 8514 Adapter Interface is Windows 2D acceleration. Quote:
8514 blast past 640x480 in 256 colors. Prominent 8514 clones are those from Paradise systems (acquired by Western Digital) PWGA-1 (also known as the WD9500), Chips & Technologies 82C480, and ATI’s Mach 8 and later chips. Compatible 8514 boards were also based on TI’s TMS34010 chip. Both 8514 and VGA standards set the stage for integrated SVGA AIB clones and IBM's XGA (1990). Quote:
ET4000AX was released in 1989, hence its R&D was before its release e.g. 1988. ET3000 was released in late 1987 a few months after IBM's 8514 and VGA releases. ET4000W32 was released in early 1992. From http://files.mpoli.fi/hardware/DISPLAY/TSENG/ ET4000W32's Windows 3.1 driver was date-stamped in March 1992. Starting AGA's R&D in 1989 would be too late for the A3000 and A500 Rev6A R&D phases. Quote:
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15 April 2024, 10:24 | #3640 | ||||||||||||||||
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AMD's RISC 29K CPUs are no different. Quote:
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Quickdraw's performance scales with graphics hardware's capabilities. PC DOS has the superior Mortal Kombat 1 and 2 ports when compared to 16-bit Amiga ports. Before 68K Amiga's Star Wars Dark Forces port, I ran the Mac 68K version on A500/A1200-PiStorm-Emu68. If I had CyberStorm 060 and CyberGraphics 64 for my A3000, I would have run Star Wars Dark Forces for the MacOS 68K. Might as well buy a Mac at this point. Quote:
You started the personality-based flame war. You departed from this topic's A1200 criticism subject. Quote:
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TIGA is not important for IBM's dominated PC standards. There are more 8514 clones when compared to TIGA. I don't care about TIGA and I never participated in Texas Instruments Graphics Architecture's hype. Rendition's MIPS-based Verite V1000 emulated VGA and it was slow i.e. not fast VGA competitive. Verite V1000's slow VGA impacted Quake and Doom. Quote:
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https://websrv.cecs.uci.edu/~papers/...LES/081401.pdf To keep the K5 design pure, AMD says that no one associated with the Intel-derived designs was involved. AMD borrowed heavily from the microarchitecture work that was done for the superscalar 29K, which was designed earlier, and much of the design team had 29K experience. Two things that were used from AMD’s x86 experience are the compatibility test suites and validation methods that had been developed to test the clean-room 486 microcode. To validate the design running real software, a Quickturn-based hardware emulator was used. Running on the hardware emulator, the K5 booted DOS in July and Windows in August. AMD believes that its investment in hardware emulation, which turned up about two dozen subtle bugs, will pay off in chips that have few problems in the initial silicon. ... The overall style of the micro-architecture is most similar to that used by NexGen’s Nx586, in which x86 instructions are decoded only one at a time but are translated into RISC-like operations that are executed in parallel. Quake's strong FPU requirement culled X86 CPU cloners. K5 runs into the clock speed wall. Quote:
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According to Linus Torvalds, Transmeta's Crusoe native code has no concept of memory protection, and there's no MMU. Quote:
NVIDIA's RTX GPUs have RISC-V CPU, but it's hidden by NVIDIA. Customers are only interested in its marketed use case. NVIDIA's CUDA influence and dominance are beyond TIGA. Quote:
IBM's VGA design wasn't designed for low cost. ET3000 has ET3000AX 1108AF-0005 custom ASIC. ET3000 was released in late 1987. Last edited by hammer; 15 April 2024 at 10:55. |
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