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Old 21 July 2013, 20:53   #81
Toni Wilen
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Quote:
Originally Posted by mark_k View Post
I wonder whether the developer copy/pasted some code from another driver (the SD64 one maybe), and didn't test v7.403 on a Piccolo card before releasing it???
That would also explain GD5434 blitter usage.
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Old 21 July 2013, 21:09   #82
bubbob42
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Quote:
Originally Posted by Toni Wilen
- Added misc panel "Hide all UAE autoconfig boards" option. It deletes all UAE-only autoconfig board ConfigDev nodes in ExpansionBase.
Is this going to affect uae.resource as well? What's it for anyway?
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Old 21 July 2013, 21:36   #83
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I'm pretty sure it has something to do with this thread: http://eab.abime.net/support-winuae/...tml#post899966
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Old 21 July 2013, 21:50   #84
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Originally Posted by TCD View Post
I'm pretty sure it has something to do with this thread: http://eab.abime.net/support-winuae/...tml#post899966
Yes. It does not have any effect on uae.resource.
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Old 24 July 2013, 11:41   #85
Leandro Jardim
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Hi Toni, here are the logs:

Last edited by Leandro Jardim; 21 September 2013 at 10:25.
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Old 26 July 2013, 02:47   #86
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Since beta 1 I can no longer mount CDs via uaescsi.device using SPTI and CacheCDFS on the Amiga side. Am I missing something, or has something broken?

WinUAE_logs.zip
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Old 26 July 2013, 09:44   #87
Toni Wilen
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Originally Posted by James View Post
Since beta 1 I can no longer mount CDs via uaescsi.device using SPTI and CacheCDFS on the Amiga side. Am I missing something, or has something broken?
Fixed, thanks. Tape drive emulation updates broke SCSI "routing".
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Old 31 July 2013, 19:00   #88
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http://www.winuae.net/files/b/winuae_2700b4.zip

Beta 4:

- Picasso IV RTG board emulation implemented. Very important information:
- * Requires full 128k raw flash rom image, available from http://www.sophisticated-development.de/ (PIV_FlashImageXX), renamed as picasso_iv_flash.rom
- * Does not use rom scanner system, image file must be located in Paths panel configured rom path.
- * Very big thanks to Tobias Seiler for answering questions about board's hardware implementation.
- * Do not bother Tobias (or anyone else) who does not develop UAE with Picasso IV emulation problems.
- * Only implements basic functionality, flifi or other extra stuff is not emulated.
- * Real Picasso IV uses flifi when displaying Amiga modes, emulation ignores it and simply displays Amiga modes normally.
- * Picasso96 and CGX4 confirmed working.

- Piccolo autoconfig size change reverted, problem appears to be caused by EGS 7.4 driver bug.
- >1024 pixel tall interlace mode fix.
- CL vertical blank handling fixed, it caused spurious interrupts in some situations.
- uaegfx driver was enabled if on-disk version was loaded and hardware board emulation was configured.

- CIA TOD counting delay emulated. Time between TICK input going active and TOD increasing has 14-16 E-clock cycle delay. Logic analyzer confirmed using ALARM interrupt.
- Disabled CIA TOD bug emulation. It makes no sense, I have AGA program that refuses to work on my real A1200 (Gets unexpected interrupt and crashes) but there is no way it didn't work 20 or so years ago..
- Workaround for hard drive enumeration waking up sleeping drives if one or more harddrives are mounted in configuration and emulation is started. To enable it, all configured real harddrives (or memory cards) need to be re-configured using GUI and config saved to create new config field required to find the drive without enumeration. Falls back to full enumeration if drive's "friendly" name does not match config saved value or new config entry is missing.
- Simplified CIA interrupt handling, removed some old hack which appears to be obsolete. I hope.
- Added CPU interrupt level information to visual DMA debugger. Each scanline has extra pixel on left side of DMA usage image that shows scanline's highest CPU interrupt level.

- Rewritten 68020/030 cycle-exact emulation core. Emulates 68020 simultaneous bus controller and instruction execution more accurately. It still runs too fast, but at least it is less fast than previously, still lots of tweaking to do but at least now it should be possible to match real 68020 more closely than what was possible with old code.

- 68020/030 CPU emulation updates, prefetch emulation (also used in cycle-exact mode) should be much more compatible, "more compatible" checked without cycle-exact now also includes instruction cache emulation.
- 68030+ more compatible (prefetch) and 68040+ "cycle-exact" modes are broken temporarily. Do not use.
- Restoring old 68020 cycle-exact saved state files may show dialog complaining about mismatched state information and restore may also fail. It is normal, will be fixed later.
- Cycle-exact CPU accesses to AGA custom registers used 32-bit accesses, not 16-bit.
- b3 .cue decoding update broke some variants, fixed.
- Added workaround for Windows returning returning invalid (too small) value when asking for ACM_METRIC_MAX_SIZE_FORMAT. (Output panel crashing)

Last edited by Toni Wilen; 31 July 2013 at 20:42.
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Old 01 August 2013, 12:57   #89
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Just quickly Testing Picasso IV with os39 + cgx v4. 8bit and 24bit modes display fine, but 15/16bit modes display screen corruption with the os39 screenmodes test card, and if you try to use it, intuition doesn't render workbench properly. However, cgxmode testcard appears to display fine in 16bit modes but will corrupt if you try to move the settings window.

Edit: Above is with zorroIII. in ZorroII the 16bit modes seem to render better, but the colour space appears wrong and fonts appear odd.

Last edited by Mad-Matt; 01 August 2013 at 13:04.
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Old 01 August 2013, 14:23   #90
Toni Wilen
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Quote:
Originally Posted by Mad-Matt View Post
Just quickly Testing Picasso IV with os39 + cgx v4. 8bit and 24bit modes display fine, but 15/16bit modes display screen corruption
I only tested 8-bit and 24-bit
15/16 seems to require byteswapped VRAM banks which are not yet implemented (I thought they were not used).

ZorroIII already fixed, ZorroII requires extra code, uses banking.
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Old 01 August 2013, 16:38   #91
Toni Wilen
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winuae.zip updated. CGX 15/16 bit modes fixed, both in Z2 and Z3 mode.

Picasso96 24-bit mode seems to have some window title blitting problems, no fixes yet available. EDIT: and fixed. CL blitter emulation bug.

Last edited by Toni Wilen; 01 August 2013 at 17:23.
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Old 01 August 2013, 18:12   #92
Toni Wilen
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http://www.winuae.net/files/b/winuae_2700b5.zip

Beta 5:

- Spectrum 28/24 official name is EGS-28/24 Spectrum.
- Stupid bug in b4 CD image update. Some CD32 games refused to play first audio track.
- Some CUE images with both INDEX0 and INDEX1 and audio tracks in separate files may have played 1-2 seconds of previous track when starting CD audio.
- Added partial support for non-direct JIT only memory mapping support that allows Z3 boards in their original non-hacked OS chosen base address (0x40000000-> vs 0x10000000->). Not available yet.
- More old 68020 CE state files load now but note that it is impossible to support all of them with new emulation code.
- Some 68020 CE mode timing tweaks.
- Emulate Picasso IV byteswapped VRAM bank (5446 CL chip feature) Fixes CGX 15/16 bit modes.
- Cirrus Logic blitter emulation bug fixed (Inversion + Color expansion + Transparency combination uses foreground color, there is no background vs foreground swapping like in all other inverted modes) Fixes graphics glitches in Picasso IV 24-bit Picasso96 modes. (I think it is time to collect all bugs in one report and send to qemu developers)
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Old 02 August 2013, 01:13   #93
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Crash with WinUAE and CGX 4. It leads to slowness on video and sound and a crash. Workbench doesnt even can boot.

Embedded in zip are the configuration I used, the logs and a memory dump.

Last edited by Leandro Jardim; 21 September 2013 at 10:25.
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Old 02 August 2013, 13:29   #94
Toni Wilen
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Quote:
Originally Posted by Leandro Jardim View Post
Crash with WinUAE and CGX 4. It leads to slowness on video and sound and a crash. Workbench doesnt even can boot.
I don't think this crash is related to CGX (or even graphics board), it can happen when display mode (PAL/NTSC) changes while system is reset.

Does http://www.winuae.net/files/b/winuae.zip still crash? (If it does, do not attach dump files, non-official betas create useless dumps)

(also implements adjustable RTG board VRAM size, VRAM bank emulation should be good enough now and should support size detection code)

EDIT: Picasso IV is not JIT direct compatible yet (really slow if enabled). Problem is multiple mirrored memory banks that JIT hates. (JIT needs separate bank, not aliases, will be fixed soon)

EDIT2: There seems to be JIT bug if MOVEM reads from non-JIT direct compatible memory bank (S_READ), memory bank read function is never called. This causes Picasso IV CGX 15/16 depth corrupted icon backgrounds.

Last edited by Toni Wilen; 02 August 2013 at 21:01.
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Old 03 August 2013, 10:53   #95
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http://www.winuae.net/files/b/winuae_2700b6.zip

Beta 6:

- Enabled Cirrus Logic RTG VRAM size configuration. CL VRAM memory bank setups used by VRAM size detection code is now (partially) emulated, should be enough to support CGX and Picasso96.
- Fixed crash that usually happened when system was reset and if it caused immediate PAL/NTSC mode change. (2.5 or 2.6 bug)
- Removed some dead JIT code, "afterPic" and "indirectKS" comptrustxxx parameters that haven't been used for ages.
- JIT MOVEM used direct mode if memory was direct capable but direct mode was disabled.
- Picasso IV VRAM is now always (*) in JIT indirect access mode. It can't be made JIT Direct compatible due to multiple banks. Also P4 Z2 CGX 15/16 bit mode has graphics corruption if JIT Direct is enabled because of JIT issue that can't be fixed. If same code is used to copy data from RAM and it is later used to copy data from VRAM, there is no way for JIT to detect that it should recompile it and use indirect mode instead of (incorrect for this bank) JIT direct mode. Other boards are very simple and can support JIT direct VRAM access.
- *) P4 Z3 mode includes now a hack that makes it JIT direct compatible. At least it seems to work..
- Cirrus emulation large basic copy blits are now 4x faster. (P96Speed horiz/vert scroll tests are not extremely slow anymore)
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Old 03 August 2013, 17:34   #96
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WinUae Better than ever but ..

Hello Toni Wilen

Now CD32 Audio sync is perfect (The Chaos Engine,Liberation)
Pirates CD32 Intro Works
Odyssey - Demo runs through

but:
Vers. 2.7.0 does not assume results from Vers. 2.5.1

for example: Filter - Horiz. size
- Vert. size

CPU and FPU: CPU Frequency - Pull Down Menu
 
Old 04 August 2013, 13:22   #97
Toni Wilen
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Quote:
Originally Posted by Amiga Fan View Post
Vers. 2.7.0 does not assume results from Vers. 2.5.1

for example: Filter - Horiz. size
- Vert. size
Not a bug. It changed in 2.6.0. Old filter settings were calculated too stupibly.

Quote:
CPU and FPU: CPU Frequency - Pull Down Menu
What do you mean? (What do you see in 2.7 vs 2.6? Remember that comparisons to previous than last official are off topic)

Last edited by Toni Wilen; 04 August 2013 at 13:41.
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Old 04 August 2013, 15:37   #98
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Hello Toni Wilen

Thank you for the quick answer.

Here are the 2 different pictures of 2.6.1 and 2.7.0 beta6
Attached Thumbnails
Click image for larger version

Name:	WinUae2.6.1.png
Views:	398
Size:	78.9 KB
ID:	36286   Click image for larger version

Name:	WinUae 2.7.0 beta6.png
Views:	359
Size:	80.1 KB
ID:	36287  
 
Old 04 August 2013, 20:28   #99
Toni Wilen
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I have been comparing 68030 and 68020 instruction execution timing chapters and instruction cycle usage seem to be nearly identical. 68020 and 68030 execution engine probably is nearly identical, bus controller improvements (delayed writes are apparently not supported in 68020), increased frequencies and data cache makes the difference.

So next plan is to implement 68020 CE execution timing exactly as documented in 68030 documentation.

Why 68030? Because 68030 documentation "head"/"tail" overlap timing information is very useful and can be used to create very accurate emulation. (If it is accurate data..) 68020 documentation timing is useless for accurate emulation purposes.
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Old 05 August 2013, 01:17   #100
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Originally Posted by Toni Wilen View Post
I have been comparing 68030 and 68020 instruction execution timing chapters and instruction cycle usage seem to be nearly identical. ... ... ...
So next plan is to implement 68020 CE execution timing exactly as documented in 68030 documentation.
Some important excerpts from wiki: http://en.wikipedia.org/wiki/Motorola_68030

1) As a microarchitecture, the 68030 is basically a 68020 core with an additional data cache and a process shrink.
2) The 68030 also lacks some of the 68020's instructions.
3) When used with a 68020 bus, the 68030 did not differentiate itself in performance from the 68020 that it was derived from.

So it seems as that might be a very good plan except for some instructions as mentioned at 2).

ps.
At wiki http://en.wikipedia.org/wiki/Motorola_68020 on Ref. No.2 there is some pdf file called "Read-Modify-Write Cycle" http://www.freescale.com/files/32bit...0UM.pdf?fpsp=1 and one also at Ref. No4. http://cache.freescale.com/files/32b...l/M68020UM.pdf (in case if you miss one of these).

Last edited by amilo3438; 05 August 2013 at 01:28.
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