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Old 02 August 2013, 20:34   #1
Ezrec
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A600/A1200 IDE as 'super clockport'

I'm working on a device that supports both 16-bit and 8-bit datapaths, and uses a single address bit to select between address and data mode.

The device works great (but slowly) on the A1200's clockport, but I'm wondering if anyone has experience with using the A1200's IDE interface as a x16 databus.

That should get me at least a 2x performance improvement, but I'm sketchy on the details of the A1200's clockport clock vs the clock on the A1200's IDE.

Does the A1200's IDE port clock continuously, or only during chip select?

What speed does the IDE port clock at? How about the clockport?
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Old 04 August 2013, 21:57   #2
Ezrec
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Evidently it's all the same speed, just different wait states.

I'll try using the /NETCS (Gary pin 16) instead of the /SPARECS - it has 0 wait states, while /SPARECS has 3/4.
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Old 05 August 2013, 14:16   #3
Cymru
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The two ports will have different address registers so software would need to be adapted to account for that issue.
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Old 11 August 2013, 17:28   #4
Ezrec
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Understood - I'm writing my own software, so that's not a problem.

Does anyone know if the ACA1230/XX series uses the /NETCS line for anything?

I don't want to conflict with that popular accelerator.
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