A500 trapdoor memory: free design

[Mathesar]

Looks really nice!
What are you using for the hard disk? I used one of these: http://m.ebay.nl/itm/SD-Micro-sd-Mem...617?nav=SEARCH
Works like a charm. I also used one of these handy micro SD extenders to relocate the micro SD card to the back of the machine.
This way I don't have to open the computer to change the SD card.

[alenppc]

Oh I am using just a regular CF card but I disconnected it for the pic. It can actually reach 6.5 mb/s on the 530

[Mq]

I just built this RAM expansion in revision B with Gary adapter in revision C.
All tests I performed on two mainboards 6A with same results.
First I built main board with one IC of RAM only. And it works perfectly.
In second step I built Gary adapter, I soldered another two ICs (total 3 ICs of RAM), then I cut jumpers on expansion board and finally I soldered wire to the middle JP2 on mainboard for chipram configurations. And it works perfectly too. I can set jumpers on Gary adapter to achive chip/slow 1MB/1MB or I can set it to 0,5MB/1,5MB too.
In every that configurations systest checked that all RAM is ok. Both in kickstart test and direct test.

I have issues with add last 4th IC of RAM. I soldered it, set jumpers on Gary adapter. Workbench shows 1MB chip and 1,5MB slow, systest shows it too in kickstart and direct, but test of RAM shows random errors on data lines. Each time errors are on different data lines. Errors are only in 4th IC. There are more error lines if I test entire memory and less error lines if I test smaller memory region. There are no errors if I test very small region contains 1-8 bytes for example.

I checked few another ICs of RAM, and I have similar issues. One IC has more errors, another has less errors, another is totaly dead. But all of them works perfectly as first IC without another ICs.

I soldered two Gary adapters, and both of them works identically.
I soldered two another main boards and I have same issues on both of them, but there are worse issues, because problem occurs with 2nd and/or 3rd ICs.

I have ICs of RAM from many diffrent manufacturers, and one works better other works worse, but I can't to find 4 ICs to work together. There is no matter if all of them are from one manufacturer or diffrent.

It looks like timing issues for me. But no one reported similar problems.
I use 74F00, 74F74, 74F139.

What can I try yet? Where is the mistake?

[PeteAU]

Originally Posted by Mq666

What can I try yet? Where is the mistake?

That's a pretty nice & clear description, errors are always in the D00000-D7FFFF area right? I assume you linked all 4 chips to RAS1?

Maybe a manufacturing fault on the U4 PCB area? I've got one PCB where they joined a signal to the ground plane.

I can't think of a good theory why only U4 would do that, maybe Mathesar will.

[Mq]

Yes, I linked all 4 chips to RAS1.
Yes, errors always are in the D00000-D7FFFF area.
I don't think so there is pcb fault, because all address and data lines are connected parallel for all chips. If there be a fault on PCB, then any chip couldn't work. Finally I checked connections with multimeter.

I tryed to test RAM area D00000-D00007 with result ok.
I tryed to test RAM area D00008-D0000f with result ok.
Any other area with just few bytes is ok too.
But if I tryed to test RAM area D00000-D0000f then result was fault on some data lines.
If I increase RAM area to test, then there are more faulty data lines in result.
Finally for all area D00000-D7FFFF test the result is no errors on one, two or three data lines only.

And once again: there are different results for different chip RAMs...

[Mathesar]

Just a quick suggestion as I don't have access to schematics and such from my vacation address; is the enable jumper on the ram board set?

[Mq]

Yes, enable jumper is set. But it must be set in any scenarios because if enable jumper is removed then extension RAM is not working at all...

[Mathesar]

With the enable jumper not set it also works... a bit.
This is because the Gary adapter fudges the ramen and chipen signals making the Amiga think it has slowram. However, the ram chip address decoder will break with the jumper disabled.

But back to your problem; it maybe a power/decoupling problem. Are all the decoupling capacitors in place? Do you have a proper 5v?

[Mq]

My multimeter shows 4,99V which is ok as I suppose. I have no oscilloscope to see if voltage is stable and clear...

About capacitors.
First time I soldered two 100n capacitors per everyone RAM chip. But when problems occured then I soldered more 100n capacitors in every free place for them on PCB. There were no difference. Finally I added additional 100uF electrolitic capacitor on PCB for voltage stability, but it is no difference too.

Any other ideas?

[PeteAU]

Originally Posted by Mq666

My multimeter shows 4,99V which is ok as I suppose. I have no oscilloscope to see if voltage is stable and clear...

About capacitors.
First time I soldered two 100n capacitors per everyone RAM chip. But when problems occured then I soldered more 100n capacitors in every free place for them on PCB. There were no difference. Finally I added additional 100uF electrolitic capacitor on PCB for voltage stability, but it is no difference too.

Any other ideas?

It's very confusing that 1M/1M works perfectly for you. Do pins 7 & 9 of 74F139 look good?

[Mq]

I checked it again, and yes: pins 7 and 9 of 74F139 are ok, and are connected with proper pins of U4.

And what about my second board where I soldered only two RAM ICs? I have same issues on that board: first U1 works ok, but second U2 has random errors on some lines.

I asked You about eventually timing issues because I have same results on two A500 (both of them are 6A). I suspect it may be a reason, because Dragmar told me he built extension and has similar issues. And he told me he has 4 A500 mainboards, and swaps Gary chip between them, and extension works properly on two Gary's only, and don't works on others on 6A mainboard...

I think maybe there are to many logic chips on Gary adapter, and it causes timing issues on some situation and some mainboards only? I don't know, i just thinking about it...

What You think Mathesar, because You are the author of our last version of Gary adapter?:-) Is it possible, or should I skip this clue?

[Mathesar]

I am on vacation at the moment so I don't have access to my stuff. I will check it out when I'm back next week. What is the code on your Gary chip?
I didn't have any problems with mine. The Gary adapter does two things:

First, it selects the proper RAM chip for each 512k bank. I have checked the timing for this part (this is the part I changed in rev c) and it is very generous. You can see the logic analyzer traces in my public gallery here: http://eab.abime.net/album.php?albumid=475

Second, it fudges the ramen signal into agnus. Now, this part i never measured so it could be that there is a potential problem there. If there is we might need a rev D

[Mq]

I have two Gary's. Both of them give me same issues. And I have two motherboards, both of them are 6A.
1st Gary signs: MOS / 5719 / 3288 43
2nd Gary signs: C=CSG / 5719 / 4390 44

[Mathesar]

I think the last number is the revision?
The second number is the manufacturing week/year.

Anyway, my Gary is from '87 and seems to be a revision 41.

It would be interesting to know what the revisions are of your friends working Gary chips.

[PeteAU]

Originally Posted by Mathesar

I think the last number is the revision?
The second number is the manufacturing week/year.

Anyway, my Gary is from '87 and seems to be a revision 41.

It would be interesting to know what the revisions are of your friends working Gary chips.

I didn't build my revC adapter yet, I'll see what it does with my Toshiba gary.

Disabling $D0 (by jumper) actually effects the RGAE and RAMEN for $10 (non-existent chip ram above 1MB). But software shouldn't use this after cold boot checks (?).

If you have a linux system, I previously made this little simulator: http://pibus.info/amiga/a501/a19.c

[Mq]

Hahaha:-) It seems that the adapter in revision C was built only by Mathesar, Dragmar and Mq. Nobody else built it around the world:-)

I'm going to do another test in the meantime.
I'm going to solder Gary adapter in previous revision B for this purpose.
I can test it simply because i still have Gary adapter PCB in revision B.
This test should show me if all chip RAMs which I have are working properly as 1,5MB slow, and main extensions boards have no any other mistakes.
I want to have three or four working mainboards with three RAM ICs for future tests to run last fourth IC.

[alenppc]

I am also using Mathesar's gary adapter and you can see from the pic I posted earlier my Gary is a 42 from '89

[Mq]

I'm sorry alenppc that I missed you.
And You have no problems with Your extension?
Did You perform direct memory test for some many rounds, and there are no any errors?
I ask, because on Your pics there are only view on RAM quantity, and no pic for test results, and You don't wrote about RAM tests.

[alenppc]

I don't have any issues. I let the tests run for over 200 cycles. Maybe the RAM chip you are using is not compatible?

[Mq]

Maybe... But anyone has compatibility problems with any chips? I tested few different chips and I have same issues on each of them. And each of them works properly as first chip on pcb (as U1)...