23 February 2018, 23:03 | #201 |
Registered User
Join Date: Mar 2015
Location: Karlstad / Sweden
Age: 52
Posts: 1,210
|
bahh skip those big vias too mucgh work. maybe implement Mathesar DS1100Z-25 on the board instead.. YUP! that will be done..
|
23 February 2018, 23:34 | #202 |
Registered User
Join Date: Oct 2017
Location: Sydney/Australia
Posts: 28
|
Re new vias, I was thinking that was going to be a big job. Just as easy to solder wires to the ic pads anyway for prototyping.
|
23 February 2018, 23:44 | #203 |
Registered User
Join Date: Mar 2015
Location: Karlstad / Sweden
Age: 52
Posts: 1,210
|
yup.. so soon I have made a place for the delayline aswell..
|
24 February 2018, 00:11 | #204 |
Registered User
Join Date: Mar 2015
Location: Karlstad / Sweden
Age: 52
Posts: 1,210
|
Well did some modifications.. hope they are ok.. should be
|
24 February 2018, 00:27 | #205 |
Registered User
Join Date: Jul 2017
Location: Munich / Germany
Posts: 88
|
That looks great, Chucky!
|
24 February 2018, 00:41 | #206 |
Registered User
Join Date: Mar 2015
Location: Karlstad / Sweden
Age: 52
Posts: 1,210
|
As I haven't tested this yet (just did it.. ) this download will be on YOUR risc.
I will order some PCBs when I am done with the devboard for my Rev2 project.. http://www.hertell.nu/webfiles/A3660Rev11.zip |
24 February 2018, 08:36 | #207 | |
Registered User
Join Date: Aug 2014
Location: Netherlands
Posts: 698
|
Quote:
I checked the changes by overlaying the gerber files and found a small error on the top layer near C204, see attached picture. All the other changes on top and bottom seem correct to me but I didn't check the inner layers as the offsets are different and Viewmate doesn't like that for the inner layers. EDIT: forgot what I said, the error was in rev1.0!!!! Rev 1.1 is OK |
|
24 February 2018, 08:39 | #208 |
Registered User
Join Date: Mar 2015
Location: Karlstad / Sweden
Age: 52
Posts: 1,210
|
oh I had that reported. didn't I fix it.. bah! will do after breakfast
|
24 February 2018, 08:48 | #209 |
Registered User
Join Date: Aug 2014
Location: Netherlands
Posts: 698
|
Ok, got the inner layers working into viewmate now, the VCC pin of the DS1100Z seems not connected to the power plane (layer 3).
PS my breakfast was at 7:00AM! |
24 February 2018, 08:56 | #210 |
Registered User
Join Date: Mar 2015
Location: Karlstad / Sweden
Age: 52
Posts: 1,210
|
weiird.. checked in sprint..
edit: ahh not so weird. as it is a trace to the cap that feeds the delayline aswell... so. it is ok |
24 February 2018, 09:05 | #211 | |
Registered User
Join Date: Aug 2014
Location: Netherlands
Posts: 698
|
Quote:
I will also order a batch of PCB's this weekend. My A3000 has been without a 060 for far too long now. Thanks again for this wonderful project! |
|
24 February 2018, 09:06 | #212 |
Registered User
Join Date: Mar 2015
Location: Karlstad / Sweden
Age: 52
Posts: 1,210
|
Well next step is to get this CoreEP3C16 FPGA devboard to a A3660 Rev2 devboard working and move all old shit to that one (NO cpu will still be a real one!) and add some memory and stuff..
so time to do serious pcb cadding (in eagle) so I can order those.. |
24 February 2018, 13:42 | #213 | |
Registered User
Join Date: Aug 2014
Location: Netherlands
Posts: 698
|
Quote:
The Altera chips are nice, how are you going to handle the 3V3/5V level shifting? I guess it will be easy with a 68060 CPU as that one is 3V3 anyway. Than you only have to convert the signals coming from the motherboard. I was looking at this project on Github: https://github.com/ezrec/galpal It can convert jedec files into a verilog model. If it works you can just clone the whole thing into an FPGA wihout coding! (Of course you still need to do some hard work to add memory, it will probably be a whole new design then) We need more people like you and PlasmaB. Closed source Amiga's are no longer the way to go. For example, the Amy board looks like incredible fun: http://eab.abime.net/showthread.php?t=90771 But why did they not open up the sources |
|
24 February 2018, 13:57 | #214 |
Registered User
Join Date: Mar 2015
Location: Karlstad / Sweden
Age: 52
Posts: 1,210
|
I have looked at the TXB0108 autosensing levelshifters..
and to replace the old buffers I will use 74LVCH162245 so internnaly on the board. everything will be fully 3.3V kicad.. yes.. I will move there someday. but I decided to do the devpcb in eagle. then when I do the final product.. it will be done in kicad. |
24 February 2018, 15:00 | #215 |
Registered User
Join Date: Dec 2017
Location: Champaign, IL / USA
Posts: 7
|
TXB0108 is meant for push-pull CMOS, not open drain. It might work but it's going to affect the propagation delay.
|
24 February 2018, 15:19 | #216 |
Registered User
Join Date: Mar 2015
Location: Karlstad / Sweden
Age: 52
Posts: 1,210
|
Bah.. so somewhat "back to drawingboard"
|
16 March 2018, 18:13 | #217 |
Registered User
Join Date: Mar 2015
Location: Karlstad / Sweden
Age: 52
Posts: 1,210
|
Today PCBs arrived.
I also got my Experimental PCB: |
16 March 2018, 19:13 | #218 |
Registered User
Join Date: Aug 2007
Location: USA
Posts: 362
|
Awesome!
|
16 March 2018, 20:28 | #219 |
Registered User
Join Date: Aug 2014
Location: Netherlands
Posts: 698
|
Beautiful!!!!
Do you have any of those rev1.1 boards for sale? I'm interested! |
16 March 2018, 20:39 | #220 |
Registered User
Join Date: Dec 2015
Location: USA
Posts: 2,933
|
Awesome! Kickin Rad!
|
Currently Active Users Viewing This Thread: 1 (0 members and 1 guests) | |
Thread Tools | |
Similar Threads | ||||
Thread | Thread Starter | Forum | Replies | Last Post |
Commodore A3640 Rev. 3.1 watchdog mod | trixeo | Hardware mods | 2 | 01 March 2014 11:45 |
A3640 rev 3.2 | bpco | MarketPlace | 1 | 27 May 2010 09:15 |
FS: Minimig PCBs and Keyrah FS | Kristian95 | MarketPlace | 7 | 03 October 2007 12:33 |
Ebay at 1 USD : A3640 Rev 3.1 for Amiga 4000 running at 32 Mhz !!! | Effy | MarketPlace | 21 | 01 August 2005 15:05 |
A3640 Rev 3.0 accelerator card problem | Tony Landais | support.Hardware | 3 | 23 December 2003 09:41 |
|
|