Improving my 6502 emulator...

[Don_Adan]

Originally Posted by meynaf

You don't need to emulate ror on 6502.
As 6502's rol/ror are actually roxl/roxr with count=1...

This is perhaps even better.
My idea is/was to set X=C bit for all emulated 6502 instructions which set Carry.
For me it will be perhaps easiest and fastest to handling with subx and add, but maybe im wrong?

Of course the best speed for 8bit emulation is pseudo JIT, something similar to JOTD's Z80 transcode, but not as source, but as 68k binary or exe file.

[Don_Adan]

After next rethinking time.
Much funniest and maybe more challenging will be created 6502 emulator without emulating CCR.
For 68020+ this is possible, for 68000 impossible (with good speed), I think.

[Don_Adan]

Something like this:

 lea Emu00,A6 ; can be used for store variables too
 subq.l #1,A0
 move.w (A0)+,A5 ; temp
 add.l A5,A5
 add.l A5,A5
 add.l A5,A5
 add.l A5,A5
 add.l A5,A5
 add.l A5,A5
 add.l A5,A5
 add.l A5,A5
 jmp (A6,A5.W)

. . .

Emu80
....

subq.l #1,A0
 move.w (A0)+,A5 ; temp
 add.l A5,A5
 add.l A5,A5
 add.l A5,A5
 add.l A5,A5
 add.l A5,A5
 add.l A5,A5
 add.l A5,A5
 add.l A5,A5
 jmp (A6,A5.W)

Emu80End
 ds.b 256-(Emu80End-Emu80)
 
Emu00     ; emu base
....

subq.l #1,A0
 move.w (A0)+,A5 ; temp
 add.l A5,A5
 add.l A5,A5
 add.l A5,A5
 add.l A5,A5
 add.l A5,A5
 add.l A5,A5
 add.l A5,A5
 add.l A5,A5
 jmp (A6,A5.W)

Emu00End
 ds.b 256-(Emu00End-Emu00)
 
Emu01
....

subq.l #1,A0
 move.w (A0)+,A5 ; temp
 add.l A5,A5
 add.l A5,A5
 add.l A5,A5
 add.l A5,A5
 add.l A5,A5
 add.l A5,A5
 add.l A5,A5
 add.l A5,A5
 jmp (A6,A5.W)

Emu01End
 ds.b 256-(Emu01End-Emu01)

. ..

Again this is only idea which can be modified (f.e internal handling for jump to next instruction can be changed) to be faster.
I dont know how fast/slow are others loop routines with CCR emulation.
Then I dont know how fast/slow it can be.

[Don_Adan]

Originally Posted by jotd

BTW maybe you can check Amoric source code, written in 1995 but could emulate 6502 1MHz on a 68030/25 properly. Not sure if it's a good result.

Seems to be good enough result.
If my (in head) computations are Ok, then 68030 50 MHz can emulate 8bit CPU's at 2-3 MHz.
68000 7 MHz can emulate 8 bit CPU's at about 0.2MHz.
Previously I thinked that 68000 cant emulate 8 bit CPU's with good enough speed.
But I was wrong, with coding tricks can.
Only 22 or 26 cycles are necessary to access 8 bit instruction.
Plus cycles necessary to emulate 8 bit instruction.